Signal Integrity

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This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off.

Available freely to Samtec customers under NDA, SIBORG works with Ansys HFSS 3D Layout to generate, visualize, optimize, and develop PCB package and component break out regions.

Artificial intelligence-generated content is rewriting the rules for data center networks, driving a need for extreme throughput and density at unprecedented scales. To meet these requirements, hyperscalers need high-performance 800G network solutions as quickly as vendors can deliver them.

Electromagnetic simulation tools will almost always give a result for any problem after pressing the run button. But is the result accurate? A methodology is introduced to establish the best practices for using the Ansys 2D Extractor and HFSS tools that include recommendations for the setup conditions, balancing accuracy, and computation time. With this methodology, an error in the absolute accuracy when solving for some electrical features can be achieved to better than 0.3%.

In recent years, the IEEE Electrical Packaging Society technical committee for electrical design, modeling, and simulation recognized the need for open-source benchmarks for the simulation tool, verification, and test and measurement solution vendors. The intention is to overcome the obstacles that developers and users of such tools and instruments often encounter and create a growing library of benchmark cases for signal and power integrity challenges. As of October 2023, there are four published benchmark cases in the repository. This article describes a proposal for a fifth benchmark.

In the second part of this article series on navigating signal integrity challenges, Abhijit Wander showcases a marked improvement in signal integrity performance, specifically in connector-only scenarios, by transitioning from a microstrip to a stripline footprint design.

Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dk_z values instead of in-plane Dk_xy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. 

Foxconn Interconnect Technology showcased the demonstration of its 224 Gbps signal transmission through their OSFP 2x1 SMT connector Upper Port with a 1M Passive DAC at the DesignCon 2024 exhibition.

With the availability of both single-ended and differential oscilloscope probes, the question often arises as to which is best for probing low-speed differential serial data signals and why. The answer depends on trade-offs involving many factors. This article provides insight into factors to consider when choosing which type of probe is best for a given situation.  

The expansion of the resin systems in laminates has been a source of reliability problems as the electronics industry has placed ever higher demands on those used in printed circuit boards. Suppliers of these resin systems have improved their resin systems to eliminate or minimize failures from expansion as the systems using the PCBs have been made more complex and subjected to ever harsher environments. Currently, the only technologies that still suffer failures from resin expansion with temperature are triple-high stacked blind vias, which Lee Ritchey explores in this article.