There was a time when the signal integrity of connections between digital ICs could be nearly ensured by following one simple rule: don’t connect more than some maximum number of input pins to any single output pin. Often the fanout limit would be around 7. No models, no simulations. Everything we needed was in the thick books of vendor datasheets that filled our shelves, the tree-killing viral precursor to AOL installation CDs. Ah, those were the days!
While a channel may pass a test, the remaining margin and thus its resilience against geometry or material variation in production may not be observable. However, such variations are critical because they may impede the performance or cause high volume manufacturing (HVM) products to fail. This coalition of authors has developed and demonstrated a polynomial chaos expansion (PCE) flow to analyze a full-featured 100GBASE-KR4 link starting from geometry specification to Channel Operating Margin (COM) margin at the receiver. Read on to see their award winning paper on the subject.
Data converter based SerDes designs are gaining popularity due to their architecture flexibility as well as the capability to implement FFE through powerful DSP. This paper provides a theoretical analysis, realistic simulations and practical comparisons between TX side FFE and RX side FFE.
Since an oscilloscope and phase noise analyzer observe jitter differently, obtaining the same value from both instruments can be challenging. This article presents a phase-noise based methodology that provides similar values as time-interval error jitter derived from an oscilloscope.
It is important in high-speed digital applications to decrease the form factor and increase signal density by reducing isolating metal layers, all while preserving comparable crosstalk, loss and dispersion at the frequency of interest. This paper takes a look at how you can do that by showing how coplanar waveguide with smaller form-factor outperforms stripline in isolation and coupling.
Wondering about the practical uses of the proposed IEEE P370 standard? This paper shows some applications of the draft IEEE P370 standard in order to demonstrate its effectiveness for interconnect measurement.
The fixtures used to characterize interconnects in complex systems can have a significant effect on the measured data, read on to get the background and perspective on IEEE P370. Check out this Outstanding Paper Award Winner from EDI CON USA 2018.