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Designed to meet the accelerating demands of AI, cloud computing, and data center networks, the new transceivers deliver power efficiency, enhanced scalability, and reliability for networks—all at a lower cost than comparable OEM transceivers.
Integrating 10 active probes into a single enclosure, the Introspect Technology USB-C Chassis Probe facilitates signal integrity checking and interoperability testing for the latest USB-C and Alt Mode implementations.
Yuriy Shlepnev of Simberian outlines the fundamental elements of DEA, examines the conditions for its accuracy, and highlights its growing importance in the future of interconnect design.
Many engineers struggle with getting their simulations and measurements to agree. Steve Sandler discusses calibration and de-embedding component measurements to help improve matching with the OMICRON Lab Bode 500.
Designed to deliver the highest optical measurement sensitivity and integrated clock recovery up to 120 GBaud, the instruments specifically target the rigorous demands of 1.6 T transceiver optical testing for R&D and manufacturing of next-generation optical interconnects for data centres AI clusters.
PCI-SIG has released the PCIe 7.0 specification, version 0.9 for member review. Version 0.9 is the final draft of the specification wherein members perform internal reviews of the technology for their essential patents.
When designing circuit boards, a change made to one aspect of the design intended to resolve an issue can cause problems elsewhere. To reduce the problem of soldering on SMA connectors in an edge launch, a significant signal integrity problem has been introduced. This article explores best practices and provides insight into avoiding an inadvertent mistake.
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