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High-speed Serializer/Deserializer (SERDES) is the backbone of digital communication systems used in Ethernet, PCIe, data storage, and high-speed digital interfaces. This application note demonstrates how the Maury Microwave J7000B noise generator enables SERDES testing through receiver sensitivity characterization, bit error rate (BER) testing, and link margin analysis.

Can copper continue to scale for next-generation AI data center interconnects? Developed by TE Connectivity in collaboration with Semtech, this DesignCon 2026 Best Paper Award-winning technical paper explores passive and active copper architectures—including DAC, ACC, and Co-Packaged Copper (CPC)—and how they can help enable the transition to the 448G era.

This solution brief introduces Keysight 3D Interconnect Designer, a physically aware environment for early exploration and validation of advanced interconnect architectures. It enables modeling and analysis of complex 2.5D and 3D structures during the architectural phase, helping teams reduce risk, accelerate development, and improve confidence before detailed physical implementation.

Precision measurements depend on stable phase performance in cable assemblies. This article explores cable construction, common phase instability causes, and practical methods to measure and characterize phase stability. Understanding these factors helps minimize errors, improve repeatability, and guides engineers in selecting the ideal cable for reliable, high-frequency testing.

This application note examines chiplet design, outlining the rationale behind the shift to chiplet-based systems and emphasizing their cost efficiency and scalability. With practical examples and recommendations, learn how to navigate the complexities of signal integrity analysis of chiplet designs using the Keysight Chiplet PHY Designer.

Are you an engineer who needs to boost signal clarity with digital pre-distortion? This step-by-step guide shows how to use the Rohde & Schwarz SMW200A and FSW to linearize output signals and improve EVM. Ideal for engineers optimizing RF performance in satellite and 5G systems.

The rise of AI, cloud, and IoT is driving data center expansion, enhancing communication speed, optical modules, and storage. This document explores data transmission technologies, testing solutions, and the importance of measuring signals for compliance. Anritsu ensures efficient, reliable testing to support modern data center networks.

Data transmission beyond 56 Gbps raises challenges in design and testing, as discussed in engineering meetings and expert panels. This eBook explores key considerations for high-speed systems, including PAM4 implementation, BER evaluation, and optimizing transmitter and receiver designs to address complexities at higher data rates. Design News forthcoming.

Serving as a signal’s primary pathway between components in RF and microwave systems, cable assembles are critical for ensuring reliable, optimal performance. This article reviews key considerations, such as amplitude stability, phase stability, durability, and flexibility, to help you choose the most suitable cable for your specific objectives.

Stressed-Receiver Tolerance testing (Rx testing) requires a reference transmitter that generates a test signal with specifically calibrated impairments combined with a test interconnect with a specified worst-case differential insertion loss frequency response. A test fixture is necessary for connecting the reference transmitter to the receiver being tested, the DUT (device under test). The test fixture may include cables, connectors, adapters, splitters, etc., whose response is necessarily included in the stressed-signal calibration. Calibration of the stressed signal is the most time-consuming and difficult step in Rx testing. This paper introduces an approach that has been effective in Rx testing for the HDMI and MIPI standards: Use of an AWG (arbitrary waveform generator) to embed the required test channel response and specified signal impairments – like jitter and noise – directly into the test signal. The technique simplifies the tests and makes them more repeatable: calibration time is reduced, and physical compliance/variable- ISI boards are eliminated along with most of the test fixture cables and connectors. We show how to embed channel characteristics in impaired waveforms along with common pitfalls, and then turn to a communication channel model for automotive standards that typically have long channels and disparate cables.