Signal Integrity

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Yuiry Shelpnev argues that simulating a link in isolation from the rest of the board (localization) is probably the most important requirement to simulate interconnects predictably. Read on to understand this important concept.

This article examines the key noise processes involved in measurements of jitter and phase noise, shows how these processes impact test results for various types of test equipment, and provides insight for interpreting these results.

If we know how to design interconnects that correlate with the measurements for 28 Gbps NRZ, is it going to be a "free lunch" to move to 56 Gbps NRZ? Not so easily, as I learned recently. Read on to see how you can benefit from some analysis and validating your tools.

Silicon Labs has introduced a new family of low-power PCI Express® (PCIe®) Gen 1/2/3/4 clock buffers that provide ultra-low jitter clock distribution in 1.5 V and 1.8 V applications.

Nyquist frequency, first harmonic, clock frequency, fundamental frequency, and some other intimidating terms might be thrown at you by an SI engineer. Read on to get up to speed on these and other terms you need to know.

When I first started studying Maxwell’s Equations, I was always intrigued by its mathematical finesse. How could someone think of that? Today we take them for granted and we sometimes forget how amazing they are and what a genius the guy was. In my view, James Maxwell should be with, if not above, Einstein and Newton among the greatest physicists to ever live, but outside our field people seldom know who Maxwell was. 

Mentor, a Siemens business, today announced its new HyperLynx® printed circuit board (PCB) simulation technology for high-performance designs, now providing the industry’s first end-to-end fully automated serializer/deserializer (SerDes) channel validation solution.

No matter how well you understand the design principles, and no matter how much experience you have in designing boards, it’s easy for some problems to slip through the cracks because you just forgot to check that feature, or your design is just too big to manually check. This is where a design rule checker comes in.

DesignCon has been a tremendous source of information for myself and for the team I have been working with at SUN Microsystems, which later became part of Oracle Corporation. This summary is an attempt to capture some of the most influential papers from the past twenty years that made the biggest impact on our work.

It’s what you don’t know you don’t know that can ruin your day. This paper notes in detailed examples that with today’s high-speed designs, we can no longer restrict our thinking in terms of signal integrity, power integrity or EMC alone. We must consider all three disciplines and become educated about each of them to achieve successful designs.