Signal Integrity

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Those interested in automating signal integrity analysis using machine learning should take a look at this work, which includes an example of a 112 Gb SerDes system analysis.

Mechanical needs and power limits are at odds with what is optimal for signal integrity. Having a metric that guides us to the sufficient SI choice rather than going for the optimal SI choice ultimately saves cost and decreases time to market. Read on for the details on Brandon Gore’s technique.

SIJ technical editor Eric Bogatin notes that there are some problems that occur over and over again across product families and applications. They have a handful of essential principles at their underlying root cause. In this blog, he explains that if we really understand these underlying principles, the root cause of the problems will be more apparent and their solutions closer to implement.

With more than three times more webinars offered in our Covid-19 era, we have more opportunities to accelerate up the learning curve or waste a lot of time. I sacrificed hours of my time watching dozens of webinars to identify these three princes. Check them out. They are well worth your time.

Uniform transmission lines are best suited for high-speed data transmission because of their broadband impedance characteristics. In some applications, a minor deviation from uniformity can help in optimizing other desired signal integrity metrics. This paper addresses some of the challenges involved with this approach.

Can common via structures transfer any data rate or are they limited with a defined bandwidth? If so, what limits its bandwidth? And what can be done when the bandwidth of the signal is greater than the bandwidth of the G-S-S-G structure? This technical feature from Dror Haviv explains.

Designers pushing the limits in their application can run into situations where the XO performance is inadequate for their next design due to the way it reacts to the noise and ripple in the power supply. To achieve optimal performance, they most likely will find they will need to do more than a simple datasheet evaluation to select their next XO. Read on for details on a PSNR test method to help select an optimal XO.

Future data center and high-speed computation require faster connectivity to meet the increasing set of applications and bandwidth. IEEE and OIF have developed 106-112 Gbps per lane electrical interface specifications P802.3ck1 and CEI-112 G2 for the 400 GbE system. To meet the next-generation system bandwidth requirement, industry and standard bodies recently kicked off new projects aiming at 800 GbE or even higher speeds beyond 1 TbE. So what comes next beyond 112 Gbps for electrical interfaces over copper (Cu) channels? Will it be 224 Gbps?

SIJ technical editor, Eric Bogatin, shares his picks for great watches or reads for this month.