Signal Integrity

Figure 4

Practical DDR Testing: Compliance, Validation and Debug

DDR memory interfaces are becoming increasingly common, and present a unique set of challenges to those designing high-speed embedded systems.  This article will examine what DDR interface testing is all about, concentrating primarily on the physical layer and solutions to common problems.
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Tek PAM4

Tektronix Automates 400G PAM4 Electrical Testing

Fully Automated Solution for OIF-CEI-56G VSR/MR/LR PAM4 Specs on DPO70000SX Real-Time Oscilloscopes

Tektronix has expanded its line-up of PAM4 test solutions to include comprehensive 400G electrical compliance testing for OIF-CEI-56G VSR/MR/LR PAM4 standards. The new 400G-TXE software package runs on high-performance Tektronix DPO70000SX Real-Time Oscilloscopes; a lineup of models which go up to 70 GHz in bandwidth. The automated turnkey solution performs PAM4 compliance test sweeps in a single pass for shorter test times, more reliable and repeatable results, and greater ease of use.

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