Steve Sandler

Steve Sandler

Steve Sandler has been involved with power system engineering for nearly 40 years. Steve is the founder of PICOTEST.com, a company specializing in power integrity solutions including measurement products, services, and training. He frequently lectures and leads workshops internationally on the topics of power, PDN, and distributed systems and is a Keysight certified expert for EDA software.

He frequently writes articles and books related to power supply and PDN performance and his latest book, Power Integrity: Measuring, Optimizing and Troubleshooting Power-Related Parameters in Electronics Systems, was published by McGraw-Hill in 2014. 

ARTICLES

Power Electronics vs. Power Integrity

The power electronics engineer and the power integrity engineer share a common goal: provide the system with the correct voltages, currents, and noise characteristics to achieve the desired performance. Unfortunately, they do not share much else. They generally use different tools, vocabulary, and figures of merit. As a result, both sides lose.


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Target Impedance Is Not Enough

Target impedance has become a standard tool when designing a power distribution network (PDN). It establishes a limit to the highest impedance the power rail on the die should see looking into the PDN. If the PDN impedance stays below this limit, even the worst-case transient current from the die will generate an acceptably low rail voltage noise.


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VRM Modeling: A Strategy to Survive the Collision of Three Worlds

This paper reviews four levels of VRM models that VRM designers, board level interconnect designers, semiconductor designers, and product managers often use to explore design tradeoffs throughout the PDN system. The choice of which one to use involves considering engineers’ levels of expertise and what problems they expect to analyze. Some tradeoffs and relative merits of the models are described.


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Characterizing and Selecting the VRM

VRMs and VRM controllers are often selected based on size, efficiency, price, or a relationship with the manufacturer. This often leads to a poor VRM selection, requiring additional engineering resources, greater time to market, as well as, higher BOM costs to correct the deficiencies. In this article, we evaluate the choices, define some useful figures of merit, and provide specific selection suggestions.


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Target Impedance Limitations and Rogue Wave Assessments on PDN Performance

A common design technique for power distribution networks (PDN) is the determination of the peak distribution bus impedance that will assure that the voltage excursions on the power rail will be maintained within allowable limits, generally referred to as the target impedance. In theory, the allowable target impedance is determined by dividing the tolerable voltage excursion by the maximum change in load current.


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Bode Plots are Overrated

I’m not saying control loop stability isn’t important, of course it is. I am saying that whether your focus is power supply design, power integrity or mixed-signal, the Bode plot probably isn’t going to provide you with a reliable or optimum solution. Here are five major reasons for saying this...
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Designing Power for Sensitive Circuits

How do you design power for sensitive circuits including LNAs, clocks, and PLL circuits? Although these circuits consume low power, they are sensitive to even very low levels of power rail noise. This EDI CON USA 2017 Outstanind Paper Award wining paper discusses the various noise paths that contribute to the degradation of the sensitive circuit as well as how to optimize, measure, and troubleshoot power supply related noise for these applications.


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Measuring Sub-milliOhm PDN Impedance

Measuring sub-milliOhms is difficult.  Getting low noise, sub-milliOhm measurements in very small circuits is a bit more difficult.  We recently had the opportunity to support R&D Altanova in performing this difficult measurement, here are some of the results.


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Designing Power for Sensitive Circuits

Low power, high performance circuits are often plagued by power supply related issues.  This common occurrence is frequently due to mythical (or misapplied) rules-of-thumb.  These rules of thumb often lead us in the wrong direction, making things worse rather than better.  In this article, I’ll highlight some of the most common mistakes engineers make and share some fundamental rules for designing clean power for sensitive circuits.  Applying these rules will result in higher performance, lower cost designs with fewer design iterations.


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