Yuriy Shlepnev

Yuriy Shlepnev

Yuriy Shlepnev is a member of the Signal Integrity Journal Editorial Advisory Board & President and Founder of Simberian Inc., where he develops Simbeor electromagnetic signal integrity software.  He received M.S. degree in radio engineering from Novosibirsk State Technical University in 1983, and the Ph.D. degree in computational electromagnetics from Siberian State University of Telecommunications and Informatics in 1990. He was principal developer of electromagnetic simulator for Eagleware Corporation and leading developer of electromagnetic software for simulation of signal and power distribution networks at Mentor Graphics. The results of his research are published in multiple papers and conference proceedings.


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Validation of Bend Models with Measurements

Bends in PCB traces look like very basic, simple structures that are easy to simulate. Technically, one can do the analysis with any electromagnetic solver with sufficiently accurate port de-embedding capabilities. The reflections from a bend in fine-line, high-speed digital interconnects are relatively small and may not even be detectable with measurement. So, who cares? Read on to find out more.

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Modeling PCB Interconnects with Geometry and Material Parameters Variations for 56 Gbps Links

Measured S-parameters and cross-sections of PCB interconnects are used in this paper to identify the parameters of electrical models suitable for statistical analysis of interconnects with manufacturing variations. The constructed models reproduce observed effects of geometry and material properties variations on the loss, delay, and impedance, and they are suitable for yield analysis of interconnects with up to 56 Gbps signals.

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40 GHz PCB Interconnect Validation: Expectations vs Reality

What does it take to design PCB interconnects with good analysis-to-measurement correlation up to 40 GHz? Is it doable with typical low-cost PCB materials and fabrication process, typical trace width, via back-drilling and the shortage of space to place the stitching vias? This paper reports lessons learned from validation projects with the goal to build a formal procedure for systematic prediction of interconnect behavior up to 40 GHz. Topics include: selection of test structures, connectors and measurement equipment, and analysis uncertainties.

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Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond

Design of PCB interconnects for data channels running at bitrate 50 Gbps and beyond is a very challenging problem that requires analyses and measurements over extremely broad frequency bandwidth from DC to 50 GHz and above. This paper shares our experience in building a practical methodology to make predictable 50 Gbps interconnects models.

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