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By treating the resistor as an electromagnetic structure rather than a lumped element, and by managing coupling, shielding, thermal paths, and compensation as part of a unified design, it becomes possible to achieve ultra‑low insertion inductance and gigahertz‑class measurement bandwidth in a device small enough for production use. The result is a measurement element that enhances system performance rather than limiting it. As power systems continue to push toward higher speed, higher density, and higher reliability, the current‑sense resistor must evolve accordingly. In this article, Steve Sandler outlines a path to that evolution.

By leveraging radiation-hardened GaN HEMTs and a compact, high-efficiency design, EPC Space not only met the stringent demands of size, weight, reliability, and performance, but exceeded them, delivering modules that have proven their worth in the harsh environment of space. Read on to learn more about how this success underscores the potential of GaN-based solutions to drive the next generation of satellite systems, paving the way for more affordable, sustainable, and resilient space exploration.

As currents increase and voltage rails shrink, managing fluctuations becomes a critical challenge. While probe noise is a major factor, the common-mode noise induced by the ground loop between the high-current DUT and the oscilloscope is often the more dominant disruptor in high-current AI environments. This experiment proves that simply switching oscilloscope vendors will not solve the problem. Read on to learn why the solution lies in the probing chain.

This article details the electromagnetic simulation of low frequencies in Ansys Electronics Desktop, focusing specifically on arbitrary length transmission lines and cables with uniform cross sections. It presents two-dimensional, quasi-static field and circuit solvers as an alternative simulation method, covering the simulation workflow while highlighting the differences and benefits of using this method as opposed to using predominant full-wave field solvers. 

Among various forms of signal degradation, skew is a key contributor to timing errors in systems operating at multi-gigabit data rates. An increasingly important factor at high speeds is material-induced skew due to local differences in dielectric constant arising from the PCB’s woven glass fabric reinforcement. This article aims to unpack the root causes of material-induced skew, particularly focusing on the glass weave effect, and explores mitigation techniques ranging from laminate selection to signal routing strategies.

Bert Simonovich explains why material anisotropy is not solely responsible for contributing to Dkeff surrounding a via hole structure. The via barrel conductor roughness and resin content of the as-fabricated dielectric pressed thicknesses must be considered and adjusted before applying this heuristic method to calculate Dkxy.

The PCIe standard has successfully doubled its per-lane bandwidth across seven generations while maintaining full backward compatibility. PCIe Gen8 continues this legacy, targeting 256 GT/s per lane using PAM4 signaling. However, with each new generation, achieving backward compatibility within the same mechanical envelope becomes increasingly complex. Follow along as Abhijit Wander explores how sustaining bandwidth scalability beyond Gen7 may ultimately require both electrical and mechanical innovation rather than purely material or footprint optimization.