Steve Sandler, Picotest

By treating the resistor as an electromagnetic structure rather than a lumped element, and by managing coupling, shielding, thermal paths, and compensation as part of a unified design, it becomes possible to achieve ultra‑low insertion inductance and gigahertz‑class measurement bandwidth in a device small enough for production use. The result is a measurement element that enhances system performance rather than limiting it. As power systems continue to push toward higher speed, higher density, and higher reliability, the current‑sense resistor must evolve accordingly. In this article, Steve Sandler outlines a path to that evolution.

As currents increase and voltage rails shrink, managing fluctuations becomes a critical challenge. While probe noise is a major factor, the common-mode noise induced by the ground loop between the high-current DUT and the oscilloscope is often the more dominant disruptor in high-current AI environments. This experiment proves that simply switching oscilloscope vendors will not solve the problem. Read on to learn why the solution lies in the probing chain.

In this article, power rail voltage measurement uncertainty is examined using several different probe configurations to monitor VCore measurements on a Picotest S2000 load stepper board. The results reveal measurement variations up to 27 mV — a level of uncertainty that can completely mask the performance improvements engineers are seeking from advanced VRM technologies. Read on to learn how engineers can trust their measurements when the uncertainty exceeds the performance gains they are trying to validate.

Follow along as Steve Sandler tests and evaluates the capabilities of generative AI using numerous experimental prompts related to SI/PI. 

AI data centers are power hungry, pushing power density to new highs while requiring long-term reliability. The increasing power density, particularly at the board and rack levels, creates challenges for stability and the unpredictable high-current surges resulting from these many-core applications.  These difficulties are driving a significant amount of new development in capacitors while also inspiring the repurposing of older technologies. Sandler examines the opportunities and challenges presented by evolving demands in the power integrity sector. 

EM simulators that are optimized for PCB PDN simulations provide an increased level of automation to enable the basics of DC IR Drop, electrothermal, and AC impedance for early detection of design issues. In this article, Heidi Barnes, Steve Sandler, and Benjamin Dannan examine why the ability to optimize a PDN for Z_Target with PCB parasitics in the frequency domain and then export to an end-to-end PI Digital Twin simulation for validation in the time domain should be standard practice for the PI engineer.

In this article, Steve Sandler presents three viable solutions for measuring ultra-low impedance with a maximum of 10 ms, each of which can be performed using sophisticated and novel FFT based 3-port measurement. These methods involve applying digitally modulated patterns to create modulated load currents up to 1500 A and recording the resulting power rail voltage perturbations.