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This article demonstrates accurate differential S-parameter measurements obtained from a single-ended 2-port VNA using ultra-broadband baluns and attenuators. This measurement system is a cost-effective alternative to purchasing a multi-port test set for a VNA. 

The increasing speeds of digital interfaces to meet the ever-growing data demands of modern society places stress on design engineers. A new test methodology for measuring intra-pair skew is necessary to verify high-speed interfaces such as PCI Express. The BERT-based setup uses a new method with dual transmitters to control the phase of signals within a differential pair, enabling granular measurement of intra-pair skew. This capability is crucial for understanding and mitigating the impact of skew on BER margins at high data rates such as 64 GT/s.

In this article, power rail voltage measurement uncertainty is examined using several different probe configurations to monitor VCore measurements on a Picotest S2000 load stepper board. The results reveal measurement variations up to 27 mV — a level of uncertainty that can completely mask the performance improvements engineers are seeking from advanced VRM technologies. Read on to learn how engineers can trust their measurements when the uncertainty exceeds the performance gains they are trying to validate.

This article discusses electrical and thermal co-simulation of multi-pin interconnects. Using Ansys Q3D and Icepak (2025R1), it highlights key practices such as parametrization, matrix reduction, and mesh settings to ensure accurate and efficient results with complex geometries.

S-parameter data can reveal more than what it initially shows. This article presents four key insights that can be derived from your S-parameters, enabling smarter simulation and improving your signal integrity intuition.

While the lossless characteristics of superconducting interconnect can trigger visions of tremendous bandwidths over infinite physical distances, superconductors have unique properties that can appreciably affect signal integrity in unexpected ways. This article introduces kinetic inductance from the eyes of signal integrity with the aim of preparing engineers to analyze superconducting links.

This article introduces a hardware-centric definition of compute cluster bisection bandwidth as a performance metric for AI-scale 448 Gbps systems. Unlike traditional abstractions, this metric is grounded in physical interconnect layout and IO port availability, enabling system architects to evaluate bandwidth provisioning through real, bidirectional link paths.

In a high-power system, such as the high-voltage side of electric vehicles (EVs), even small imperfections in the topology and layout inside the box can have major consequences in EMC testing. Parasitic pathways that would be inconsequential in a low-voltage design can allow limit-busting amounts of noise to escape in a high-voltage system. Learn more from Karen Burnham about the best practices, simulation/analysis, and expert design reviews that are critical for EV compliance and on-time deliveries.  

This article covers some typical failure cases for automotive EMC tests in which the cable resonances play dominant roles. It explores the mechanisms of cable resonance, providing test examples and simulation results to demonstrate root causes. Learn more about system design details that impact cable resonance behavior.

In this article, Tyler Huddleston explores causality in relation to signal and power integrity simulations. He reviews how causality affects time-domain simulation fidelity as well as how non-causal s-parameters can result from real measurements and simulations. Learn about how non-causal data can be avoided and the consequences of using a non-causal model in time-domain simulations.