Technical Articles

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This article discusses electrical and thermal co-simulation of multi-pin interconnects. Using Ansys Q3D and Icepak (2025R1), it highlights key practices such as parametrization, matrix reduction, and mesh settings to ensure accurate and efficient results with complex geometries.

S-parameter data can reveal more than what it initially shows. This article presents four key insights that can be derived from your S-parameters, enabling smarter simulation and improving your signal integrity intuition.

While the lossless characteristics of superconducting interconnect can trigger visions of tremendous bandwidths over infinite physical distances, superconductors have unique properties that can appreciably affect signal integrity in unexpected ways. This article introduces kinetic inductance from the eyes of signal integrity with the aim of preparing engineers to analyze superconducting links.

This article introduces a hardware-centric definition of compute cluster bisection bandwidth as a performance metric for AI-scale 448 Gbps systems. Unlike traditional abstractions, this metric is grounded in physical interconnect layout and IO port availability, enabling system architects to evaluate bandwidth provisioning through real, bidirectional link paths.

In a high-power system, such as the high-voltage side of electric vehicles (EVs), even small imperfections in the topology and layout inside the box can have major consequences in EMC testing. Parasitic pathways that would be inconsequential in a low-voltage design can allow limit-busting amounts of noise to escape in a high-voltage system. Learn more from Karen Burnham about the best practices, simulation/analysis, and expert design reviews that are critical for EV compliance and on-time deliveries.  

This article covers some typical failure cases for automotive EMC tests in which the cable resonances play dominant roles. It explores the mechanisms of cable resonance, providing test examples and simulation results to demonstrate root causes. Learn more about system design details that impact cable resonance behavior.

In this article, Tyler Huddleston explores causality in relation to signal and power integrity simulations. He reviews how causality affects time-domain simulation fidelity as well as how non-causal s-parameters can result from real measurements and simulations. Learn about how non-causal data can be avoided and the consequences of using a non-causal model in time-domain simulations.

Traditional data-center physical layer architectures have undergone a significant transition due to the growth of east-west traffic within the data center for AI/ML cluster applications. This data growth has driven enormous demand for throughput in both chip-to-chip and chip-to-module channels. In this paper, which was awarded Best Paper Award at DesignCon 2025, the authors explore various physical layer design improvements through simulation and modeling tools.

AI data centers are power hungry, pushing power density to new highs while requiring long-term reliability. The increasing power density, particularly at the board and rack levels, creates challenges for stability and the unpredictable high-current surges resulting from these many-core applications.  These difficulties are driving a significant amount of new development in capacitors while also inspiring the repurposing of older technologies. Sandler examines the opportunities and challenges presented by evolving demands in the power integrity sector. 

This paper covers a study previously presented at DesignCon 2025 in which a novel SI-PI layout optimization methodology and via routing pattern were developed to address challenges and enable UCIe-xA64 connections to achieve 36 Gbps in Organic Interposer packaging. This summary provides an overview of the challenges, innovations, and methodologies presented in the study, offering solutions for high-speed multi-die system integration.