Zurab Khasidashvili

Zurab Khasidashvili is a senior software engineer at Intel Corporation. He graduated from Tbilisi State University in Georgia in 1985 and obtained his PhD in logic from the same institution in 1991. From 1992 to 1998 Zurab worked as a postdoctoral fellow in several institutions: INRIA in Paris, the University of East Anglia in Norwich, and the NTT Research Labs in Atsugi, Japan. After moving to Israel in 1998, he worked at Ben-Gurion and Bar-Ilan Universities, and in 1999 joined Intel's Formal Technologies Group in Haifa. Before joining Intel, Zurab worked in term rewriting and lambda calculus. At Intel he has worked in multiple areas of formal verification, including equivalence checking of hardware, model checking, SAT-, SMT- and EPR-based decision procedures, ATPG, and STE. More recently, Zurab worked on verification of HW/FW/SW protocols and on security validation. Currently Zurab is working on applying big data analytics to HVM yield and to Electrical Validation. Zurab is the author of over 60 publications and patents. He has also served as a technical program committee and organizing committee member for a number of conferences and symposia.