Brandon T. Gore

Traditional data-center physical layer architectures have undergone a significant transition due to the growth of east-west traffic within the data center for AI/ML cluster applications. This data growth has driven enormous demand for throughput in both chip-to-chip and chip-to-module channels. In this paper, which was awarded Best Paper Award at DesignCon 2025, the authors explore various physical layer design improvements through simulation and modeling tools.

This paper, awarded the Best Paper Award at DesignCon 2024, explores what is meant by bandwidth during the standardization process, the implications of test and verification attached to certain bandwidth requirements, as well as differences between acquisition range, band limited filters, and s-parameters for time domain processing. 

In preparation for 224 Gb/s and beyond, Samtec engaged in a research project to characterize the transmission performance of emerging PCB material sets. Brandon Gore explores the current state of the art for PCBs and cables, comparing them and assessing the technology gap to fully support the insertion loss performance required for higher data rates.

Mechanical needs and power limits are at odds with what is optimal for signal integrity. Having a metric that guides us to the sufficient SI choice rather than going for the optimal SI choice ultimately saves cost and decreases time to market. Read on for the details on Brandon Gore’s technique.