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This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off.

Artificial intelligence-generated content is rewriting the rules for data center networks, driving a need for extreme throughput and density at unprecedented scales. To meet these requirements, hyperscalers need high-performance 800G network solutions as quickly as vendors can deliver them.

Electromagnetic simulation tools will almost always give a result for any problem after pressing the run button. But is the result accurate? A methodology is introduced to establish the best practices for using the Ansys 2D Extractor and HFSS tools that include recommendations for the setup conditions, balancing accuracy, and computation time. With this methodology, an error in the absolute accuracy when solving for some electrical features can be achieved to better than 0.3%.

In recent years, the IEEE Electrical Packaging Society technical committee for electrical design, modeling, and simulation recognized the need for open-source benchmarks for the simulation tool, verification, and test and measurement solution vendors. The intention is to overcome the obstacles that developers and users of such tools and instruments often encounter and create a growing library of benchmark cases for signal and power integrity challenges. As of October 2023, there are four published benchmark cases in the repository. This article describes a proposal for a fifth benchmark.

Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dk_z values instead of in-plane Dk_xy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. 

Phase-locked loops (PLL) are used extensively throughout modern electronic systems. In data communication systems, PLLs are used in transmitter clock multipliers and receiver clock recovery circuits. A key performance factor for the PLL is how they manage jitter. A critical PLL metric is the jitter transfer function which is based on the PLL loop bandwidth. There are several measurement methods that can be used to characterize PLL loop bandwidth and jitter transfer. When operating on digital data signals, PLL bandwidth can vary with the data pattern. In this article, Greg Le Cheminant, Keysight Technologies, focuses on test methods that allow operation on data rather than only clock signals provide very high precision and useful insights into PLL behavior.

Within the PCB industry, FR-4 materials have long been accepted as “standard” materials. However, their use was not specific to the types of board being designed. For today’s high-speed, high-frequency designs, careful engineering and material selection relative to the resin systems and glass weave styles needed will ensure that a product will work as specified, as designed, and as manufactured. In addition, the finish of the copper used in the signal and power layers also needs to be controlled in order to ensure that loss goals are met.

Reducing various types of noise such as reflections, mode-conversion, return-path bounce, and crosstalk becomes a serious challenge in signal integrity designs of high data-rate interfaces. In this article, Dror Haviv focuses on the analysis and properties of the FEXT, presenting an alternative way to analyze the FEXT and its properties using the superposition theory of the differential signal and the common signal.