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Signal Integrity Track Content Announced for EDI CON USA

EDI CON USA 2016, a conference that brings together engineers working on high-frequency analog and high-speed digital designs, taking place September 20-22 in Boston, Mass. at the Hynes Convention Center, announces its Signal Integrity/Power Integrity track for this year’s conference and exhibition. The exhibition will host more than 138 exhibiting companies from the RF, microwave, and high-speed digital industries, including demonstration pods in the Signal Integrity Zone.
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Practical Method for Modeling Conductor Surface Roughness Using Close Packing of Equal Spheres

Presented at DesignCon 2015

In the GB/s regime, accurate modeling of conductor losses is a precursor to successful high-speed serial link designs. In this paper, a practical method for modeling conductor surface roughness is presented. Obtaining the roughness parameters solely from manufacturers’ data sheets, conductor loss can now be accurately predicted from first principles. By using a close packing of equal spheres model, the radius of the spheres and area of the multi-sphere tiled base are determined then applied to the Huray “snowball” model. A case study, based on Megtron-6 and N4000-13EP dielectric with HVLP and VLP copper foils respectively, validates the model’s accuracy.


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