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Power distribution networks (PDNs) delivering power to ICs in a system need to be thoroughly designed and analyzed in order to make sure any voltage fluctuation on the rail is within the tolerance of every IC connected to that rail.  As ICs on the rail draw power, they generate a voltage fluctuation on the rail.  The PDN must have the capacity to supply enough charge such that the resulting voltage drop is less than the maximum voltage drop each IC on the rail can tolerate.  If voltage fluctuations appear outside IC tolerance limits, a slew of problems can surface such as IC damage, failure, or reduced lifespan.

This March 20-22, EDI CON CHINA will take place at the China National Convention Center in Beijing, China. This year’s event brings its unique, high-quality technical conference with learning and training opportunities back to Beijing.

Nyquist frequency, first harmonic, clock frequency, fundamental frequency, and some other intimidating terms might be thrown at you by an SI engineer. Read on to get up to speed on these and other terms you need to know.

When I first started studying Maxwell’s Equations, I was always intrigued by its mathematical finesse. How could someone think of that? Today we take them for granted and we sometimes forget how amazing they are and what a genius the guy was. In my view, James Maxwell should be with, if not above, Einstein and Newton among the greatest physicists to ever live, but outside our field people seldom know who Maxwell was. 

The current trend for many application requiring data converters is to get closer and closer to a full SDR (Software Defined Radio) system. While SDR architecture brings many benefits in terms of flexibility and SWaP-C (Size, Weight, Power and Cost) it often translates into higher bandwidth capability and is directly linked to the data converter sampling speed with the Shannon-Nyquist theorem.

Mentor, a Siemens business, today announced its new HyperLynx® printed circuit board (PCB) simulation technology for high-performance designs, now providing the industry’s first end-to-end fully automated serializer/deserializer (SerDes) channel validation solution.

No matter how well you understand the design principles, and no matter how much experience you have in designing boards, it’s easy for some problems to slip through the cracks because you just forgot to check that feature, or your design is just too big to manually check. This is where a design rule checker comes in.

DesignCon 2018 featured a 14-track conference covering the latest developments in hardware and high-speed communications design with over 100 technical sessions, three full day boot-camps, and more. Read this full review of the new products introduced at the event.

The IEEE P370 standards group was formed over four years ago to draft a standard for the Electrical Characterization of PCB interconnects up to 50 GHz. On Monday, Jan 30, 2018, more than 30 engineers attended the organization’s first “plug fest” at the Santa Clara Convention Center to exercise some of the features of the proposed standard.

At DesignCon 2018, the IEEE P370 standards group announced the release of two important tools to assist all engineers for de-embedding. In the presentation by Jason Ellison and Heidi Barnes, “A NIST Traceable PCB Kit for Evaluating the Accuracy of De-Embedding Algorithms and Corresponding Metrics”, the two new tools were announced, a board kit and a de-embedding software tool.