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EDI CON Online Reg Open

EDI CON Online Opens Registration

EDI CON Online, an interactive event being held online Tuesdays in October 2020, has opened registration. Attendees can register for free in a single sign-on portal for all technical sessions, workshops, and keynotes occurring every Tuesday in October (and on demand after the event). 


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EDI CON Online Announces Platinum Sponsors and Keynote Speakers

EDI CON Online, an interactive event being held online Tuesdays in October 2020, has announced its platinum sponsors and keynote speakers. In its second year, the event’s technical, workshop, and keynote sessions will occur at no cost to attendees and will be available live with question and answer sessions or on demand after the event.


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A Guide for Single-Ended to Mixed-Mode S-parameter Conversions

Signal integrity engineers almost always have to work with S-parameters. If you have not had to work with them yet, then chances are you will sometime in your career. As speed moves up in the double-digit GB/s regime, many industry standards are moving to serial link-based architectures and are using frequency domain compliance limits based on S-parameter measurements.


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A Simple Demonstration of Where Return Current Flows

This simple measurement demonstrates the most important principle in SI/PI and EMI: that the return current will flow in the path of lowest resistance below about 10 kHz. But above about 10 kHz, the return current will begin to redistribute in the return path to be adjacent to the signal conductor. Read on to learn more.


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PC Board Design for Low EMI in IoT Products

Most of today’s digital-based products create a large amount of on-board RF harmonic “noise” (EMI). While this digital switching won’t usually bother the digital circuitry itself, that same harmonic energy from digital clocks, high-speed data buses, and especially on-board DC-DC switch-mode power supplies can easily create harmonic interference well into the 600 to 850 MHz cellular phone bands and even as high as 1575 MHz GPS/GNSS bands, causing receiver “desense” (reduced receiver sensitivity).


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Design for AMI: A New Integrated Workflow for Modeling 56G PAM4 SerDes Systems

In the future, the complexity of circuit implementation will increase dramatically and modeling of high-speed SerDes systems will continue to be a huge challenge. Modeling equalization circuit characteristics has become extremely important to ensure the success of the final platform implementation and provide a strong signal integrity design guide. This paper reviews the common challenges of converting an existing detailed architectural model to an IBIS-AMI model and some of the ways to address these challenges. It also includes an illustration of the workflow to model Intel’s 56G PAM4 SerDes.


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Seriously Funny Science Worth Watching

The Ig Noble Prizes are awarded every year for an individual or group who “did something that makes people laugh and then think.” In our time of increased stress what a perfect combination of activities for engineers to participate and experience: laughing and thinking.


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