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The ability to analyze and predict the current/temperature effects of isolated traces is helpful, but the actual temperature of a trace may be different because of uncertainties in the actual trace thickness or board material thermal conductivity coefficient. This article traces the effort to see what PCB board parameters have the most impact in determining trace temperatures, followed by a look at related PCB design considerations. Read on to learn more.

The goal of power integrity (PI) analysis is to ensure not only sufficient but also stable power to all chips in a system. This article uses the example of a DDR4 application to explain the choices surrounding the use of decoupling capacitors to reduce impedance, and which performance parameters are critical to success.

There seems to be more standards every day, and some have rumored that there is a movement to merge or consolidate some existing standards. We will examine some of the standards and how they came to be. For starters, we will limit ourselves to three main types of standards in the industry: on-board or internal, input/output (I/O), and networking. I/O and networking are similar, but networking standards typically apply to longer distance links than I/O standards. There is, as often happens, overlap between these types, and some, such as PCI-express, have standards that apply to more than one of them.

Optoelectronic industry designers have traditionally used discrete optical devices for transceiver designs. The process requires manual integration of discrete free-space optical components such as lasers, modulator, photo detectors, isolators, MUX/DE-MUX, lenses in the form of optical gold box sub-assemblies such as transmit optical sub-assembly (TOSA).

Ask any engineer how to reduce the cross talk between two signal traces and the most common answer will be to add a guard trace. This should be the last resort, not the first choice. Guard traces can often introduce more problems than they solve.  Find out why in this article.

Engineers invest tens to hundreds of thousands of dollars in signal integrity simulation software—the goal being to gain an accurate understanding of how signals are going to behave in the final product. But how do you do that early in the design process without reliable, verifiable electrical properties for the dielectrics incorporated into your design?

When starting a new project, board designers are often overwhelmed when trying to choose appropriate diff pair geometry, board material, and stackup to meet high-speed serial link loss budgets. Part of the printed circuit board (PCB) interconnect challenge is modeling transmission lines accurately. 

What is special about a material like PTFE that gives it such a low Dk and Df, while an epoxy has such a high Dk and Df? It is all about the chemical structure of the molecules and how they interact. Understanding the connection between chemistry and electrical properties is the starting place to engineer optimized materials for high-speed interconnects.

An increasing number of manufacturers are adding or retrofitting wireless technology into new or existing products. These products typically include mobile, household, industrial, scientific, and medical (ISM) devices. This transition towards “everything wireless” is in full swing, and with it comes problems with electromagnetic interference (EMI) from the product itself interfering with sensitive on-board cellular, GPS/GNSS, and Wi-Fi/Bluetooth receivers. Read on to find out what to do about it.

This paper details a methodology of using multiple Huygens Boxes on the coupling path to predict RFI/desense at early design stage in mobile devices—all with an aim to minimize the RFI.