As Confucius says, “Reviewing the old, then we gain knowledge of the new.” As high-speed interfaces enter the 100Gbps era with upcoming Tbps implementations, a certain level of retrospection may be helpful in order to better position ourselves for future designs.
By comparing the features of the past generations of high-speed input-output (HSIO) interfaces, we have identified trends in technology development in terms of various aspects of the HSIO standards. This article aims to summarize the nominal impedance adopted by generations of prevailing HSIO standards.
Among hundreds of technical parameters that an HSIO interface spec may define, impedance is among the most crucial due to the fact that it underpins the other key performances metrics such as return loss (RL), insertion loss (IL), insertion loss deviation (ILD), crosstalk, mode conversion, and others.
However, the major question associated with any impedance specification is: which one should we choose, the traditional impedance of 100 Ohm, 85 Ohm, or something in-between? Engineers as well as standard committee members often hold different opinions on which of the two nominal impedance values delivers better system performance in HSIO channels. To better answer this question, we begin with the history of why 100Ohm was adopted in the first place.
The 100 Ohm impedance system actually dates back to the 50Ohm impedance system. According to reference [1], the adoption of 50 Ohm was influenced by the following factors:
- With a characteristic impedance of around 30 Ohm, an air-filled coax cable can handle the max RF power delivery;
- With a characteristic impedance of around 75 Ohm, an air-filled coax cable has the lowest RF power attenuation.
- Taking the geometric mean of 30 Ohm and 75 Ohm and picking the round value, 50Ohm was accepted by the RF industry as the universal impedance. This nominal impedance value has been consistently used to this day.
In the last two decades of last century, the HSIO system emerged, and differential signaling started to prevail. In the beginning, the coupling between the P and N wires was usually very small or even negligible, such as in the two ports of a differential pair on VNA. As a result, the nominal differential impedance in HSIO interface standards was initially established at 50 + 50 Ohms, ie, 100 Ohm.
Although the 50/100 Ohm impedance system were inherited from RF standards, inherently, HSIO systems have some differences from RF systems, mainly:
- In normal cases, power handling is not a concern.
- Attenuation remains a concern for long reach channel
- Highly dense and compact systems are often required
- IC packages tend to present impedance profiles lower than 50/100 Ohm due to the impact of the package ball’s parasitic capacitance.
- EMI compliance requirements become more challenging as the data rate goes up and the feature size goes down
- The differential impedance can be less than the simple double of the single-ended impedance by 10%, or even more depending on the pair coupling strategy chosen, i.e., tight coupling or loose coupling.
From the list above, we can conclude that the circumstance are different for HSIO systems as compared to RF systems. Consequently, the 50/100 Ohm impedance might not be the best choice, and perhaps the value should be lower than that.
As the industry move towards higher density, higher speed designs, 85 Ohm impedance systems began to be advocated by some companies. Compared to the 100 Ohm system, the 85 Ohm impedance system demonstrated the following advantages [2]:
- Smaller dielectric height in stackup
- Less loss for long reach channels
- Closer to the center value of most package impedance profiles
- Ease via design
- More contained EM fields, hence less EMI
In addition, the 42.5/85 Ohm impedance system is also closer to the 40 Ohm nominal impedance of DDR memories, which eases the design of HSIO system with DDR implementation.
In contrast, there are also some advantages associated with the 50/100 Ohm system:
- Smaller trace width at the same dielectric height
- Save the renormalization post-processing on the measured s-parameter since most measurement instruments are of 50/100 Ohm
- Compatibility with existing test equipment
Table 1 lists the nominal impedances of some widely applied HSIO standards. From the table we have the following observations:
- The PCIe spec specifies a large range of impedance. This could be due to that PCIe is a cost-sensitive standard and needs to accommodate the large variation of impedances. Thereafter, a wide range of nominal impedance is required
- Another reason for the large range of impedance might be that the PCIe spec tried to incorporate both 85 Ohm and 100 Ohm impedance systems, since multi-mode SerDes devices are often used for both specifications.
- Being an even more cost-sensitive standard, the USB family of specs enjoys the smaller impedance tolerance range by decisively moving closer to 85 Ohm. USB abandoned 100 Ohm as its nominal impedance.
Table 1 The nominal impedance and PCS encoding system of some prevailing HSIO standards
Interface |
Data rate |
Zdiff (nominal) (Ω) |
Zdiff (range) (Ω) |
PCS Encoding |
PCIe gen2 base/cem |
5Gbps/lane |
100/85 |
Undefined/68 – 105 |
8b/10b |
PCIe gen3 base/cem |
8Gbps/lane |
100/85 |
Undefined/70 – 100 |
128b/130b |
PCIe gen4 base/cem |
16Gbps/lane |
85/85 |
Undefined/72.5 – 97.5 |
128b/130b |
SAS2 |
6Gbps/lane |
100 |
±10% |
8b/10b |
SAS3 |
12Gbps/lane |
100 |
±10% |
8b/10b |
SAS4 |
24Gbps/lane |
100 |
±10% |
128b/150b |
USB 3.2 gen1 |
5Gbps/lane |
90 |
±10 |
8b/10b |
USB 3.2 gen2 |
10Gbps/lane |
90 |
±10 |
128b/132b |
USB 3.2 gen2x2 |
20Gbps/2-lane |
90 |
±10 |
128b/132b |
USB4 gen2 |
10Gbps/lane |
85 |
±15% |
128b/132b |
USB4 gen3 |
20Gbps/lane |
85 |
±15% |
128b/132b |
USB4 gen3x2 |
40Gbps/2-lane |
85 |
±15% |
128b/132b |
DisplayPort 1.4 |
8.1Gbps/lane |
100 |
±15% |
8b/10b |
DisplayPort 2.0 |
20Gbps/lane |
85 |
±15% |
128b/132b |
HDMI 2.0 |
18Gbps/3-lane |
100 |
±15% |
8b/10b |
HDMI 2.1 |
48Gbps/4-lane |
100 |
±15% |
16b/18b |
THUNDERBOLT1 |
10.3125Gbps/lane |
85 |
±15% |
128b/132b |
THUNDERBOLT2 |
20.625Gbps/2-lane |
85 |
±15% |
128b/132b |
THUNDERBOLT3 |
41.25Gbps/2-lane |
85 |
±15% |
128b/132b |
XAUI |
12.5Gbps/4-lane |
100 |
±10% |
8b/10b |
10GBASE-KR |
10.3125Gbps/lane |
100 |
±10% |
64b/66b |
25GBASE-KR |
25.78125Gbps/lane |
100 |
±10% |
64b/66b |
XLAUI |
41.25Gbps/4-lane |
100 |
100±10% |
64b/66b |
40GBASE-KR4 |
41.25Gbps/4-lane |
100 |
100±10% |
64b/66b |
100GBASE-KR4 |
103.125Gbps/4-lane |
100 |
100±10% |
64b/66b |
CAUI-4 |
103.125Gbps/4-lane |
100 |
100±10% |
64b/66b |
Infiniband QDR |
10Gbps/lane |
100 |
100±10% |
8b/10b |
Infiniband FDR |
14.0625Gbps/lane |
100 |
100±10% |
64b/66b |
Infiniband EDR |
25.78125Gbps/lane |
100 |
100±10% |
64b/66b |
Table 2 The nominal impedance and PHY encoding system of some prevailing HSIO standards
Interface |
Data rate |
Zdiff (nominal) (Ω) |
Zdiff (range) (Ω) |
PHY Encoding |
CEI-56G-XSR-NRZ |
56Gbps/lane |
100 |
100±10% |
NRZ |
CEI-56G-LR-NRZ |
56Gbps/lane |
100 |
100±10% |
NRZ |
100GBASE-KR2 |
106.25Gbps/2-lane |
100 |
100±10% |
PAM4 |
400GBASE-KR4 |
425Gbps/4-lane |
100 |
100±10% |
PAM4 |
CEI-56G-LR-ENRZ |
112.4Gbps/4-wire |
100 |
100±10% |
ENRZ |
CEI-112G-MCM-CNRZ |
348Gbps/6-wire |
100 |
100±10% |
CNRZ |
Notes:
- The Thunderbolt 1/2/3 spec only specify the nominal impedance value but does not give the range of the reference impedance. We assume the prevailing range of 10% for these standards.
- OIF-CEI specs only specify the physical layer encoding scheme (PHY Encoding), i.e., whether it is NRZ, PAM4, or other schemes such as ENRZ, CNRZ, etc. When the base rate interfaces are adopted by application HSIO standard committees, the PCS layer coding schemes such as 8b/10b, 64b/66b, etc, (PCS Encoding) will be applied on top of the physical layer coding scheme for the purpose of DC balance, transition ratio, etc.
- The impedance range of DisplayPort varies with different part of the channel (chip, PCB, connector, cable). Here the max range of ±15% [3], which is for a connector, is used.
- The DisplayPort, USB4 data are from public sources.
- For earlier generations of HSIO which are not listed above, the nominal impedance is 100 Ohm for majority of them.
In some specifications, such as TBT and Ethernet, the range of impedances are not specified, and only the nominal impedance is given. The reason could be that the applicable impedance range can be very wide. Since the package and the connector’s impedance profile can vary from as low as <70 Ohm to above 120 Ohm, specifying a narrow range would mean excluding some chip/connectors from the compliant lineup. However, in reality these parts still can work fine within HSIO system.
Yes, impedance is important, but it is not the final determining factor for the performance of the entire HSIO channel. That is why the industry developed the COM as a much more comprehensive FOM (Figure of Merit) compared to relatively simpler metrics such as RL, ICR, ICN, IMR, etc.
Summarizing above, we can reach the following conclusions:
- For a practical system, the impedance of each part of an HSIO channel can vary in a wide range yet still be able to deliver spec-meeting performance. In lieu of this, when there is a range defined in the spec, it should be only used as informative reference rather than mandatory. For NRZ and CNRZ-5 systems, the impedance range should be specified wide and loose. This is different from most other parameters such as the voltage swing, the range of equalization taps, etc., for which the ranges are precise and should not be exceeded for compliant designs. For PAM-4 systems where RL is critical, the impedance must be more tightly controlled due to PAM-4’s known vulnerability to reflections.
- On the other hand, it doesn’t mean that the nominal impedance is flexible or arbitrary. As a critical characteristic of an HSIO system, the goal for the impedance system is to keep the overall reflections produced by each component within the system as small as possible. The more reflection, the less energy will be transmitted to the receiver. Therefore, the goal is always to have the impedance of each part of the channel center around the nominal impedance as close as possible. With the latest generations of HSIO systems (particularly those that use PAM-4), some companies have already set the impedance tolerance for PCB traces to +-5% so as to minimize the reflection. In sum, a wide range of impedance allows the variation of each part of the system without necessarily rendering the NRZ and CNRZ-5 systems to fail, although the story is different for PAM-4 systems. Meanwhile a channel with a tight impedance profile is one of the prerequisites of achieving the highest performance of a HSIO system.
Consequently, we have the following suggestions for standards committees:
- Move the nominal impedance to 85Ohn in order to utilize the multiple advantages of this impedance system.
- For NRZ and CNRZ-5 systems, use a wide impedance range, such as 70Ohm – 120Ohm as the informative reference impedance range.
- Consider tightening the range when using PAM-4.
References
- The History of 50 Ω; http://www.rfcafe.com/references/electrical/history-of-50-ohms.htm
- Jan De Geest, Dana Bergey, John Lynch, Dennis Miller, Stefaan Sercu, “Improving System Performance by Reducing System Impedance to 85 Ohms”, presented at DesignCon2007, Santa Clara, CA, 20
- VESA DisplayPort (DP) Standard, Version 1.4a, 19 April, 2018
- OIF_FEC_100G-01.0.pdf, 100G Forward Error Correction White Paper (May 2010)