Signal Integrity

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Wondering what IBIS Open Forum actually does? Mike LaBonte lifts the curtain and invites you to learn more about IBIS models.

JitterLabs announces the immediate availability of an independent test program for evaluating reference clock compliance to PCI Express® (PCIe®) v4.0 BASE specifications, covering all four generations of PCIe technologies (2.5 to 16 GT/s).

If you want help measuring things, there’s no cheaper way to do it than this!

Read on to see how to determine if you should you use a differential pair in your test coupon and pay for a 4-port measurement, or use a single-ended test line and only pay for a 2-port measurement.

In this DDR 101 introductory piece, learn about the fundamentals of a DDR interface and some basics of physical-layer testing.

Component simulations cannot be properly compared to measurements without de-embedding the test fixture—here’s step-by-step instructions to get the job done well.

Tektronix has expanded its line-up of PAM4 test solutions to include comprehensive 400G electrical compliance testing for OIF-CEI-56G VSR/MR/LR PAM4 standards. The new 400G-TXE software package runs on high-performance Tektronix DPO70000SX Real-Time Oscilloscopes; a lineup of models which go up to 70 GHz in bandwidth. The automated turnkey solution performs PAM4 compliance test sweeps in a single pass for shorter test times, more reliable and repeatable results, and greater ease of use.

Keysight is offering a free seminar to help high-speed digital design engineers, SI and PI engineers, and design team managers, learn the skills they need to overcome signal integrity (SI) and power integrity (PI) challenges.