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What are the optimal methods (and their resulting challenges) to achieve 224/212 Gb/s common electrical I/O (CEI) and Ethernet, the highest speed/data rate per lane electrical input/output (I/Os) and link systems? By way of understanding, we begin by investigating optimal pulse amplitude modulation (PAML) vs. channel characteristics at 224 Gb/s.

Understanding and minimizing discontinuities is increasingly important as serial links become both shorter and faster. Applying the old edge rate to roundtrip relationship to the modern era, Donald Telian in this article offers a rule-of-thumb to help gauge which interconnect structures, and hence discontinuities, to care about – and to what degree.  

Rob Russell, VP of Satellite Business Unit at Vicor, discusses the challenges for power in the LEO and MEO satellite market and how those issues are being addressed with new architectures.

If you’ve just started on the path of designing high-speed serial links or have designed dozens of your own, Don Telian’s Signal Integrity in Practice is the book that will accelerate your engineering judgment and possibly save you from multiple design spins. Eric Bogatin takes a closer look at what he considers a must-have book for new and experienced engineers.

The ability to perform localized radiated immunity testing is a concept rarely taught. Here Kenneth Wyatt shows he is able to solve several RF immunity issues with nothing more than a handheld personal walkie-talkie, or by producing an intense RF field using an RF generator feeding a near field probe.

In earlier DDR systems, the clock, command, and address signals (here in referred to as C/A) were distributed to multiple DRAMs using a forked topology, in which these signals propagate to all the DRAMs in the system at approximately the same time. The propagation delays on the command and address lines (in such systems) introduced timing skew into the system, limiting the operating frequency of the bus and eventually impacting the performance of these memory systems.

Ever wonder how much energy is required to transmit data and why so much power is dissipated into heat? SIJ EAB member Yuriy Shlepnev takes a closer look.

Who doesn’t love an easy-to-use 2D field solver to calculate the single-ended or differential impedance of PCB transmission lines? Eric Bogatin takes this one from Sierra Circuits for a test drive.

The higher speed of USB4 has prompted a move to retimers and away from redrivers within USB-C systems. This article describes the method of designing retimers into USB4 systems.

This article is from Chapter 2 of the eBook "The Printed Circuit Designer's Guide to...Thermal Management: A Fabricator's Perspective" authored by Anaya Vardya, CEO, American Standard Circuits, and published on iConnect007 here.