Featured Stories

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The Goldilocks TDR

It pains me to say this, but there is such a thing as turning the TDR up too high and it is also easy not to have enough. If there is a “too high,” and a “not high enough,” there must also be a “just‐right,” or Goldilocks, setting. Using measurements, and a smattering of math, the Goldilocks setting answers
will be clear. Read on to find out how.


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Demodulating Spread Spectrum Clocks

Verifying the modulation profile of SSC has historically been challenging because it involves a frequency shift as a function of time. Mike Hertz explains that by tracking the frequency measurement parameter, an oscilloscope can display the SSC modulation profile as a function of frequency versus time. Read on to see how it’s done.


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Current Distribution, Resistance, and Inductance in Power Connectors

Engineers who design and model power distribution networks require accurate component level models from high frequency down to DC.  Accurate modelling of power connectors can guarantee best power transfer and minimize power-induced noise.  In this paper, which won a DesignCon 2020 Best Paper Award, the authors analyze the frequency-dependent resistance and inductance of various power connectors as well as pin patterns.


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Evaluating Oscillator Power Supply Noise Rejection: It’s the Total Jitter that Matters

Designers pushing the limits in their application can run into situations where the XO performance is inadequate for their next design due to the way it reacts to the noise and ripple in the power supply. To achieve optimal performance, they most likely will find they will need to do more than a simple datasheet evaluation to select their next XO. Read on for details on a PSNR test method to help select an optimal XO.


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Impulse Response from Insertion Loss

This article explains how to convert channel insertion loss data in a standard Touchstone file into the channel impulse response for time domain simulations. It also shows how some pre-processing of the Touchstone data can help improve results by eliminating the ringing that results from the use of frequency-limited measurement data. Read on to see how.


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Options for Copper Beyond 112 Gbps

Future data center and high-speed computation require faster connectivity to meet the increasing set of applications and bandwidth. IEEE and OIF have developed 106-112 Gbps per lane electrical interface specifications P802.3ck1 and CEI-112 G2 for the 400 GbE system. To meet the next-generation system bandwidth requirement, industry and standard bodies recently kicked off new projects aiming at 800 GbE or even higher speeds beyond 1 TbE. So what comes next beyond 112 Gbps for electrical interfaces over copper (Cu) channels? Will it be 224 Gbps?


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EDI CON Online Reg Open

EDI CON Online Opens Registration

EDI CON Online, an interactive event being held online Tuesdays in October 2020, has opened registration. Attendees can register for free in a single sign-on portal for all technical sessions, workshops, and keynotes occurring every Tuesday in October (and on demand after the event). 


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