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This paper explains the theory, implementation, constraints, and cost of using CTLE, FFE, DFE, and FEC equalization schemes for serial links at and above 112 Gbps.
The Open EyeConsortium announced the establishment of its Multi-Source Agreement (MSA) outlining its mission to standardize advanced specifications for lower latency, more power efficient and lower cost optical modules targeting 50Gbps, 100Gbps, 200Gbps, and up to 400Gbps optical modules for datacenter interconnects over single-mode and multimode fiber.
This paper is a case study on causality problems in PDNs during power-aware SI simulations. It covers the causality of a PDN, and it reveals the impact on a design if a causality check is not done on the PDN for the package or board.
Since an oscilloscope and phase noise analyzer observe jitter differently, obtaining the same value from both instruments can be challenging. This article presents a phase-noise based methodology that provides similar values as time-interval error jitter derived from an oscilloscope.
I received a demo version of a new quick and easy TDR. I decided to take it for a test drive by measuring all the cables I had lying around my lab. The results were surprising!
The Electronic Design Innovation Conference and Exhibition (EDI CON) announced that this year, in conjunction with Microwave Journal (MWJ) and Signal Integrity Journal (SIJ), it will host an online, interactive event for high frequency and high speed design engineers on September 10-12, 2019.
If performance matters, if the interconnects are not transparent, or if you want to develop good habits, you will want to incorporate these seven habits in your next two layer board design.
It is important in high-speed digital applications to decrease the form factor and increase signal density by reducing isolating metal layers, all while preserving comparable crosstalk, loss and dispersion at the frequency of interest. This paper takes a look at how you can do that by showing how coplanar waveguide with smaller form-factor outperforms stripline in isolation and coupling.
EDI CON China 2019 returned to Beijing and the Chinese National Convention Center (CNCC) April 1-3 with an exhibition of 100 industry-leading companies as well as a technical conference that included 2 and a half days of technical presentations, workshops, panels and featured keynote talks.
When you make a 2-port shunt through measurement using a commercial vector network analyzer the measurement includes an undesirable ground loop. Left uncorrected, the ground loop introduces significant errors. This paper shows how to solve this problem.