Gary Giust

Gary Giust works at SiTime, defining and productizing industry-leading timing solutions. Prior to SiTime, Gary founded JitterLabs, an independent lab for promoting, selecting, and qualifying timing devices. He previously held engineering and marketing positions at Applied Micro, PhaseLink, Supertex, Cypress Semiconductor, and LSI Logic. Gary is an industry expert on timing technology and applications, and enjoys teaching industry professionals at the University of California at Santa Cruz, Silicon Valley Extension and elsewhere. He co-authored a book on timing, is an invited speaker, an internationally published author in trade and refereed journals, was a past Technical Chair for the Ethernet Alliance's backplane subcommittee, and holds 18 patents. Gary obtained a Ph.D. from Arizona State University, Tempe, an MS from the University of Colorado, Boulder, and a BS from the University of New Hampshire, Durham, all in Electrical Engineering.  





Phase Noise Aliases as TIE Jitter

Here’s a look at how phase noise converts to time-interval error jitter, which is particularly important to those working on reference clocks for high-speed SERDES or sampling clocks. Read on to see how this can help debug systems to reduce sources of timing noise.

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Figure 5

Measuring Phase Noise with Baluns

Differential clock and timing devices are commonly characterized for phase noise using baluns. While deceptively simple to use, baluns perform a fairly complicated process that can unknowingly introduce artifacts into measured results. This article describes such artifacts, discusses why they appear and how to eliminate them. Recommendations are provided for selecting a balun and using it to accurately characterize devices for phase noise.

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