Introduction
Picket fence vias are used to stitch a copper pour region to a lower ground plane on a board. These are usually placed around the edges of where signal lines are routed, as shown in Figure 1.
Figure 1 An example of a typical board with picket fence vias
The stitching vias create a grounded coplanar microstrip (GCPMS) structure. What is the value of a GCPMS structure with picket fence vias over a simple microstrip (MS) in high-speed digital applications? These two structures are compared in Figure 2.
Figure 2 Example of a MS and GCPMS, each with a 60 mil thick dielectric and 50 ohm impedance.
Which is better for high-speed digital signals, and why is it so common to see copper pour with stitching vias on a board? To answer this question, we have to consider the role the copper pour plays, the role the stitching ground vias play, and what metrics are used to describe the performance.
Our evaluation suggests that some legacy code has carried into current designs, and the use of copper pour with stitching vias may be overvalued. Only in very rare cases does it really fix a problem, and if not executed correctly, it can actually introduce additional problems.
The Problem GCPMS Solves over MS
The purpose of an interconnect is to connect two or more terminals. Once connectivity is established, the only thing the interconnect will do is degrade signal performance by introducing noise. This can be by
- reflection noise from impedance discontinuities, measured by return loss
- loss noise from conductor and dielectric loss, which vary with the square root of frequency and linearly with frequency, respectively, measured by insertion loss
- non-TEM mode dispersion, measured by a frequency at which dispersion begins
- radiation loss, which increases with the square of the frequency, measured by a dB/Hz2 per inch term
- cross-talk to adjacent conductors, measured by a Sij term
Which problem(s) does a GCPMS structure solve over a MS? When we look at these effects, we have to be aware of how the various geometry terms affect each one.
Impact on Reflection Noise
The first term, reflection noise, is about impedance matching the transmission line to the source, typically 50 Ohms. Given the dielectric thickness and Dk, and a fixed edge-to-edge separation, s, of the signal trace and coplanar ground, the line width can be optimized to achieve the target impedance equally well in both cases. There is no difference in impedance control between GCPMS and MS.
Impact on Conductor and Dielectric Loss
The insertion loss is affected by the signal line width and the fringe-field distribution in air.
The line width for the GCPMS will always be narrower than the line width for the MS because of the higher fringe fields between the signal line and the adjacent ground plane. The narrower the spacing between the signal line and adjacent copper pour, s, the narrower the signal line will be for the same target impedance, and the higher the conductor loss in the case of the GCPMS.
This means the conductor loss will always be higher in GCPMS. How much depends on the relative line-width difference, which scales with the ratio of the edge-to-edge spacing (s) and dielectric thickness (h), or s/h.
The impact on dielectric loss from the cross-section will depend on the distribution of fringe field lines in the air compared with the bulk material. In the case of the GCPMS, when s << h, the coupling between the signal line and the adjacent copper pour will be higher than to the bottom ground plane. This means we may see a higher percentage of field lines in the air above the trace, a lower effective Dk and a lower effective Df. This means GCPMS will always have a slightly lower dielectric attenuation than in MS. How much depends on the relative spacing of s/h.
The calculation of the conductor width for a 50 ohm line and the relative conductor and dielectric loss of either structure can be explored with a 2D field solver, such as the free tool available on the Sierra Circuits website, https://impedance.app.protoexpress.com/?appid=UNSEIMPCAL, as shown in Figure 3.
Figure 3 The geometry structures used to calculate the losses with the 2D field solver.
Two cases are compared: the extreme case of a thick dielectric, h = 60 mils, as in a 2-layer board, and for h = 5 mils, as in a multi-layer board. In each case, the edge-to-edge separation between the signal line and the copper pour is s = 5 mil.
The thinner the dielectric, the narrower the line width will be for 50 ohms.
Using the Sierra Circuits field solver results in the following attenuations, as summarized in the table below, using 1 oz copper for all the examples:
From this analysis, as expected, the conductor loss is higher for the GCPMS due to the narrower line width, while the dielectric loss is slightly lower because a higher fraction of field lines is in air when the edge-to-edge spacing is less than the distance to the bottom ground plane.
Since dielectric loss dominates at higher frequency, the lower dielectric loss of the GCPMS has slightly less attenuation than the MS. This is seen in the plots in Figure 4 for the case of h = 60 mils and h = 5 mils. The differences are small.
Figure 4 The attenuations from conductor and dielectric loss for the MS and GCPMS: 60 mil thick dielectric on the left, 5 mil thick on the right.
Non-TEM Behavior and Radiation Loss
When the line width becomes comparable to a ½ wavelength, MS becomes dispersive because of non-TEM modes. This contributes to frequency-dependent Z0 and Dk as well as increased radiation loss. The cut-off frequency where non-TEM behavior dominates is approximated by (Edwards, T. C., & Steer, M. B., 2016). Foundations for Microstrip Circuit Design (4th ed.). John Wiley & Sons.)
Note: The term w + 0.4h is the "effective width" of the microstrip, mathematically accounting for the electric fields that fringe outward past the physical edges of the copper trace
For the case of h = 60 mils, this cutoff frequency is about 20 GHz. Even below this frequency, the effective dielectric constant increases, and the characteristic impedance decreases. In this paper by Rao, et.al., it was shown that the impact from non-TEM behavior on dispersion in the Dk is noticeable as low as 2 GHz for FR4 type materials in a 2-layer, 1.6 mm thick board.
Close to the cut-off frequency, the radiation loss begins to increase. This is sometimes referred to as a leaky mode. Above this frequency, radiation loss increases with the square of the frequency.
For the GCPMS, with a line width of 30 mils, the cutoff frequency is pushed above 100 GHz. Its impact on loss is negligible at a lower frequency.
However, in the special case of a thick dielectric, such as 60 mils, in a 2-layer board, the shorting vias between the top and bottom ground planes will look like opens at their quarter wave stub resonance, of 25 GHz.
Given these limitations in thick boards, maybe a better design guideline is not to use 2-layer, thick dielectric boards, for applications above 10 GHz without considering the non-TEM effects and vertical resonances in the shorting vias.
In a 4-layer board with a dielectric thickness of about 10 mils, the non-TEM cut-off frequency and the quarter-wave resonance of the vias are well above 100 GHz, and neither of these effects will be seen below 100 GHz.
This suggests that GCPMS was originally introduced to suppress higher-order modes in MS when using 2-layer boards. This reduces dispersion, but more importantly, radiation from the early onset of the non-TEM modes.
In 4-layer boards, this difference disappears, and there is no advantage to using GCPMS over MS. This is an example of legacy code that has been carried into all current designs. In other than 2-layer boards, it is recommended and used to fix a problem that does not exist.
It is more appropriate to suggest, as a design guideline, that for application frequencies near and above 10 GHz, do not use a 2-layer FR4 board, regardless of its geometry. Instead, for this application space, use a 4-layer board. Because some non-TEM behaviors are visible as low as 3 GHz, the recommendation should really be not to use 2-layer boards for applications with 10 GHz or higher signals.
Impact on Cross-talk from the GCPMS Geometry
Independent of the radiation losses and non-TEM behaviors, another perceived advantage of a GCPMS over MS is reduced crosstalk. This is due to a sense that the proximity of the adjacent ground on the top layer, spaced, s, between adjacent traces, will “shield” field lines to other traces, compared to when the nearest ground on the bottom layer is, h, away. When s =< h, this is the case; the top ground is closer to the bottom ground, and may provide less field line coupling with the GCPMS than just MS. But, as s becomes larger than h, this difference disappears.
The impact of the coplanar ground and its shorting vias can be explored through numerical simulation using HFSS, a full-wave 3D field solver.
Other than the already discussed non-TEM issues, the coupling terms will scale with the line-width-to-dielectric thickness and separation ratios. To simplify this analysis, lossless structures were analyzed using a signal line width of 10 mils and a dielectric thickness of 5 mils, with a spacing between the trace edge and coplanar ground of 5 mils. This makes the ratio of s/h = 1. Only a thin dielectric layer was considered since 2-layer boards should not be used for applications above 10 GHz anyway.
Five cases were analyzed, as shown in Figure 5. The baseline is for just MS, then various combinations of floating or grounded copper pour outside or between the two traces were included. In each case, the cross talk between two single-ended transmission lines was calculated.
Figure 5 The five different cases analyzed with HFSS in this study.
With a dielectric thickness of 5 mils, common in a 4-layer or more board, the non-TEM behaviors and quarter wave resonances of the shorting vias are pushed to well above 100 GHz and are irrelevant for these examples.
Impact of the Shorting Vias
The most important design guideline to consider is to never leave any copper pour floating. This will create a cavity between the top layer of copper pour and the adjacent ground layer. This cavity will resonate at a frequency corresponding to a ½-wavelength along its longest dimension. In this simulation example, the cavity length was 1 inch, so the cavity's resonant frequency is expected to be about 3 GHz and its multiples.
It does not matter if the floating metal is outside the traces or between the traces, there will be some coupling between the signal traces and the floating metal, which will be enhanced at the cavity resonance, resulting in suck-outs in the insertion loss of the traces. This is evident when comparing just MS and MS with floating copper outside the signal traces, as shown in Figure 6.
Figure 6 The insertion loss of one signal line in the case of MS and coplanar MS with the copper pour floating. The resonances at about 3 GHz multiples are prevalent.
These cavity resonances are suppressed by adding shorting vias. Of course, the shorting vias are only shorts at frequencies well below their ¼ wave resonances, which, for the case of 5 mils long vias, is well above 250 GHz. Below this frequency, they effectively change the cavity's boundary conditions and shift the cavity resonances until they approach their Bloch-wave resonance.
Suppressing Cavity Resonances with Shorting Vias
The Bloch wave resonance, named after Felix Bloch, refers to the resonance when the spacing between the shorting vias is ½ wavelength. At this frequency, there will be a strong resonance due to the propagating fields bouncing between the vias and interfering with each other, just as electron waves bounce back and forth between crystal lattice ions, creating energy band gaps for conduction electrons.
For a periodic discontinuity in a transmission line with a physical pitch (distance between via centers, d, the first Bloch resonance occurs when the pitch is equal to half a wavelength in the medium.
Where:
fBloch is the cutoff frequency (Hz).
vp is the phase velocity of the signal in the PCB substrate.
d is the center-to-center spacing (pitch) of the vias.
The vias in the cavity will see the bulk dielectric constant in the material. When the Dk = 4, the speed is about 6 inch/nsec. This translates to a Block frequency of
fBloch = 3 GHz/d with d in inches.
For a via-to-via spacing of 0.1 inches, this is a Block wave frequency of 30 GHz.
We expect the effectiveness of shorting vias in suppressing cavity resonances to extend up to a large fraction of the Bloch wave frequency, 30 GHz, for this case of 100 mil spacing between the shorting vias.
When the insertion loss of a signal trace adjacent to a floating copper pour is compared with the case of the copper pour now with shorting vias 100 mils apart, the cavity resonances, as seen in the insertion loss suck-outs, are suppressed up to about 20 GHz. In these test cases, the 100 mil spacing was chosen to show the transition region where the shorting vias are effective and then when they are not. This transition frequency is about 20 GHz. This behavior is shown in Figure 7.
Figure 7 The insertion loss of the MS, MS with the floating copper pour on the outside, and with floating copper pour and stitching vias. Case 3 (green) shows the reduction of IL dips until 20 GHz from stitching vias.
This suggests that a robust general design guideline is to adjust the spacing between the shorting vias so that the Block wave frequency is at least 2x the highest signal application bandwidth. This is really a restatement that the spacing between the vias should be closer than ¼ a wavelength of the highest signal bandwidth, a popular design guideline.
As a general guideline, this translates, for the case of Dk = 4, to
d < 1.5 inches/BW[GHz]
If the signal bandwidth is 30 GHz, the Bloch wave frequency should be pushed to at least 60 GHz, and the via-to-via spacing should be closer than 50 mils.
It should be noted that this analysis is specifically about copper pour on signal layers, creating a cavity with the lower ground plane. Cavity resonances in stripline structures are also a problem, and if there is a chance of exciting these resonances, it is good practice to use an array of shorting vias to suppress them, using the same spacing guidelines of < ¼ wavelength.
Impact on crosstalk with shorting vias
It goes without saying that unless shorting vias are included in any floating copper, using the guidelines above, there will be suck-outs in the insertion loss. When the floating metal is between two signal traces, as is the case when the floating copper is intended as a pour to reduce crosstalk, this coupling to the cavity resonances can dramatically increase crosstalk.
The crosstalk between two signal lines is best described by the near-end crosstalk, S31, and the far-end crosstalk, S41. When a floating copper pour is added between the two MS traces, there will be increased crosstalk due to coupling to the cavity resonance. When the shorting vias are added, the low-frequency resonances are suppressed, and the crosstalk is reduced. This is the principle of using a guard trace.
However, the impact on the crosstalk reduction in MS is not very large. The example with the edge to edge spacing between the signal traces, s = 5 w, is shown in Figure 8, which compares these three cases.
Figure 8 FEXT and NEXT plots for just the MS, MS and floating guard trace and MS and guard trace with shorting vias. IN each case, the spacing between signal traces is 5w.
In this example, the resonance coupling from the guard trace at multiples of 3 GHz with no shorting vias is clear in the NEXT and FEXT. The shorting vias suppress the resonant coupling below 20 GHz and, in fact, offer lower FEXT with the shorting vias than without them. The NEXT peak is reduced from about -40 dB to -45 dB, and the FEXT is reduced from about -35 dB to -45 dB when using a guard trace and appropriate shorting vias. This difference is very frequency-dependent.
Because the spacing between the signal lines without the guard trace is already large, the NEXT is low, and the guard trace decreases the NEXT by less than -5 dB. The FEXT for this 1 inch coupling length is about -30 dB. Adding the guard trace, reduces this about -10 dB in the best case.
The relative effectiveness of the guard trace decreases as the edge-to-edge spacing between the signal lines increases, compared to the dielectric thickness. The bottom ground plane helps to sculpt the fringe field lines and keeps them localized to each signal line, reducing crosstalk. Whether a ground plane is added h above the existing ground plane, or there is just the bottom ground plane, does not affect the fringe field distribution, as s becomes large compared to the dielectric thickness, h.
When the trace-to-trace separation is increased from 5 line widths to 10 line widths and s = 100 mils, h = 5 mils, there is no difference in the cross talk with or without the guard trace. In this case, NEXT and FEXT have been reduced from the case with no guard trace due to the higher separation. The presence of the guard trace has little impact on the NEXT or FEXT at this separate, where s >> h. This is seen in Figure 9.
Figure 9: showing the FEXT (top) and NEXT(bottom) with trace to trace spacing = 10 w
This suggests that when the traces are far apart, there is no problem solved by adding a copper pour with the proper use of shorting vias. The FEXT and NEXT are not affected by the surface ground, because there is already a ground layer between the signal traces, a distance h below the surface. Whether the ground layer is on the top layer or h below the surface, as long as h is small compared to the trace-to-trace separation, there is no reduction in cross-talk.
A common application of copper pour of signal layers is to suppress long-range coupling between traces on a board. This analysis suggests that in the best case, with sufficient shorting vias between the top copper pour and the bottom ground plane, there is no long-range coupling between traces, and the use of copper pour for reduced cross-talk is a perceived solution to a problem that does not exist.
Final recommendations:
The principles and numerical examples explored in this analysis suggest that the blanket use of copper pour with shorting vias is overrated. Its early introduction was intended to reduce dispersion and radiation loss associated with non-TEM behavior in MS interconnects above 5 GHz in two layer circuit boards with thick dielectric.
However, in multilayer boards, this problem does not exist. While there is a small advantage in reducing FEXT using a guard trace, this advantage disappears as the signal traces are moved apart. Including a copper pour on a signal layer in a multiple-layer board to solve a non-existent problem, and not designing it with sufficient shorting vias, will increase the noise, not decrease it, the opposite of fixing a problem.
This suggests a few robust design guidelines:
- Never use a floating copper pour on a signal layer. Adding a floating copper pour solves no problem and will only increase crosstalk at bandwidths near the cavity resonances.
- Do not use a 2-layer board for signal bandwidths of 10 GHz or higher unless the non-TEM effects, especially radiated emission are considered. A grounded copper pour on a two-layer board may fix this problem, but it introduces other issues as frequencies approach 25 GHz.
- On a 4-layer board, there is no radiated emissions problem that GCPMS solves over a MS below 100 GHz. Why use it?
- There is no problem copper pour with the appropriate shorting vias solves when traces are farther apart than about 5 w. This is either with the copper pour between the signal traces or outside them.
- For the case of closely spaced signal traces, a guard trace between them with appropriate shorting vias can reduce the FEXT by as much as 10 dB in some cases and might be a solution to achieve lower crosstalk when every dB counts.
- In stripline structures, if there is a concern to suppress cavity resonances, shorting vias as close as ¼ the wavelength of the highest signal bandwidth should be added. This is a pitch of d [inches] = 1.5/BW[GHz].