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This paper presents two modeling methodologies for ADC-based SerDes that mitigate IBIS-AMI architectural misalignments, and a corresponding model correlation methodology.
With increasingly significant amounts of current necessary for modern processor solutions, Ben Dannan broaches the topic of the resulting lowered impedance targets. Specifically, how to achieve impedance targets below 10 uOhms. Read on to find out how he does it.
In this article, Douglas Brooks and Johannes Adam illustrate how the thermal impacts of heated traces and pads are not limited to the board layer on which they exist; read on to see how they are reflected on every board layer above and below them.
In this paper, the signal integrity design challenges of 224Gbps-PAM4 networking system are analyzed, and the key enablement solutions are proposed to meet the end-to-end (E2E) loss budget of ≤ 40 dB.
In Donald Telian’s book he reveals his steps for successful serial links, called the “7 Steps to Successful Serial Links.” In this article, he discusses his most important steps: (one) minimize discontinuities, and (two) manage loss.
This article shows the impact of using one of the first DDR4-3200 FPGA memory controllers, the Xilinx Versal, interfaced to a UDIMM to show a method for accurately correlating signal integrity simulations to measurement.
In this installment of Practical EMC, Ken Wyatt reviews real-time spectrum analyzers, helping you to pick the one best suited to your needs and within your price range.
In this power-electronics article, we focus on noise measurement of 48 V range voltage regulators (VRs), up to a maximum of 65 V. We propose a noise measurement setup and examine this method.
About 150 years ago the first stable transatlantic cable was laid and messages were sent between Ireland and Newfoundland over copper. The data rate on this cable was not even 1 bit/sec, it was 0.1 bit/sec. Concerns over the cable reliability and the slow data rate led some to believe copper was doomed as a communication media for these long cables.
In part one of this article, Bert Simonovich explained how air entrapment is the primary reason for Dkeff and phase delay discrepancies between simulation and DUT measurements. Read on to discover how to fix this issue.
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