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EDI CON Online 2021, an interactive event that was held every Wednesday in August 2021, provided workshops, technical sessions, and keynote talks for engineers working on RF, microwave, EMC/EMI, signal integrity, and power integrity designs.
How well do statistical models predict the behavior of real-world systems? How can we make predictions about the likeliness and severity of worst-case system behavior? In this article, the authors explain how they used a function generator and oscilloscope to collect varying population sizes of measurement parameter results in order to investigate the accuracy of a statistical model's predictions.
While eye diagrams and eye masks are both useful, they each hide as much information as they reveal. Read on to see how to get the most out of them for your design.
Bends in PCB traces look like very basic, simple structures that are easy to simulate. Technically, one can do the analysis with any electromagnetic solver with sufficiently accurate port de-embedding capabilities. The reflections from a bend in fine-line, high-speed digital interconnects are relatively small and may not even be detectable with measurement. So, who cares? Read on to find out more.
SIJ recently caught up with Timothy Vang, vice president of marketing and applications for Semtech’s Signal Integrity Products Group about the company’s latest product for 50Gbps PAM4 5G front haul deployments, how signal integrity and RF/wireless design overlap, and what is next for the team at Semtech.
In this tongue-in-cheek experiment that leads to actionable conclusions, Ben Dannan and Steve Sandler set out to discover a method to mitigate the lack of an isolation calibration step on a VNA.
Data usage is increasing every year, and the communications industry is working diligently to support the increased demand. This article discusses why we need more data, what data center physical layer architecture changes are needed to support higher data rates, and how connector manufacturers are improving designs to support higher data rate systems.
Distinguished engineer and director at Broadcom SerDes Architecture and Modeling Group is announced winner of the world's premier conference for chip, board, and systems prestigious award.
DesignCon honors Cathy Liu, engineer and director at Broadcom SerDes Architecture and Modeling Group, as the 2021 winner of its Engineer of the Year award.
In the January 2021 print issue and the April 2021 online issue of the Signal Integrity Journal, I wrote an editorial in which I threw down a gauntlet to tool vendors to offer low cost or free versions of their tools to help engineers accelerate up the learning curve. Ansys picked up that gauntlet and now offers a free version of their industry standard electromagnetic simulator suite, Electronics Desktop.
Designing the right PCB stackup can make or break product performance. If the product has circuitry that is impedance and transmission loss sensitive, then paying attention to conductor surface roughness is paramount. Sometimes, however, the roughness of adjacent reference plane(s) is overlooked. If the adjacent high-speed signal layer uses smoother copper than one or both reference planes, a higher insertion loss than expected for that layer will occur and possibly cause a product to fail compliance. So, how is this determined before finalizing the stackup? Read on to find out.