Articles Tagged with ''interconnect''

This article lays out the basics of signal integrity problems, explains s-parameters, and identifies challenges in high-speed design.

What are the greatest technical challenges facing connector designs for future high-speed deployments?Jairo Guerrero of Molex delves into the technical challenges for today’s connectors, the influence of applications such as automotive and data/telecom, and he gives an intriguing glimpse into the product development process at Molex.

The ability to analyze and predict the current/temperature effects of isolated traces is helpful, but the actual temperature of a trace may be different because of uncertainties in the actual trace thickness or board material thermal conductivity coefficient. This article traces the effort to see what PCB board parameters have the most impact in determining trace temperatures, followed by a look at related PCB design considerations. Read on to learn more.

When starting a new project, board designers are often overwhelmed when trying to choose appropriate diff pair geometry, board material, and stackup to meet high-speed serial link loss budgets. Part of the printed circuit board (PCB) interconnect challenge is modeling transmission lines accurately. 

I received a demo version of a new quick and easy TDR. I decided to take it for a test drive by measuring all the cables I had lying around my lab. The results were surprising!

It is important in high-speed digital applications to decrease the form factor and increase signal density by reducing isolating metal layers, all while preserving comparable crosstalk, loss and dispersion at the frequency of interest. This paper takes a look at how you can do that by showing how coplanar waveguide with smaller form-factor outperforms stripline in isolation and coupling.

SIJ talked with Roger Tushingham about how to foster innovation and next-generation circuit materials needs.

How do you achieve high bandwidth in your measurements while minimizing current load on your DUT? Given that your DUT is a power rail, you really don't want to draw too much current from it., or your measurement system will distort the rail. But these two measurement criteria are at loggerheads with each other. It's a quandary, and it has to do with the fundamental nature of signals on interconnects.

Yuiry Shelpnev argues that simulating a link in isolation from the rest of the board (localization) is probably the most important requirement to simulate interconnects predictably. Read on to understand this important concept.