Technical Articles

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Maintain SI at 224 Gbps PAM4 by Moving Beyond Traditional Design Techniques

As data center systems evolve to support increasingly demanding artificial intelligence (AI) and machine-learning (ML) workloads, maintaining signal integrity at 224 Gbps PAM4 has become a major architectural challenge. One of the primary limitations is insertion loss in conventional PCB traces, which increasingly constrains performance as data rates rise. This paper explores a co-packaged interconnect approach that addresses this limitation by placing the high-speed separable interface directly on the package substrate.


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Optimization of IBIS-AMI Model Parameters with Machine Learning Algorithms

This article describes the use of Cadence’s Sigrity signal and power integrity solution ML optimization algorithm to quickly and efficiently converge on the best set of parameters in a set of IBIS-AMI models. The application of Sigrity was investigated for refining IBIS- AMI parameters to find the optimal set of values to maximize a specific metric.


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