Technical Articles

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Validation Shift-Left: Enabling Early SerDes Mixed-Signal Validation

This DesignCon 2022 paper focuses on the use of models for overall system validation, including both system models that evaluate the end-to-end link performance, and models used for individual block functionality to validate a mixed-signal design.


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Zero Cost SerDes System Channel Simulation

In this paper, John Baprawski gives an overview of modeling SerDes systems in a channel simulator, introduces the zero-cost tools available at SerDesDesign.com, and gives an example of simulating a SerDes system with Tx and Rx IBIS-AMI models – all to bring the SI engineer a low cost path for modeling and simulating SerDes systems.


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Improved Methodology to Accurately Perform System Level Power Integrity Analysis Including an ASIC die

Modern ASIC-based systems can no longer be designed by rules of thumb when it comes to power integrity. In this DesignCon 2022 paper, Ben Dannan et al explain a workflow using lumped-looped models to improve efficiency, while achieving accuracy, and reducing the overall risk to a given system PDN.  



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