Power Integrity

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Understanding how to make and interpret power supply impedance is very useful for optimized, low noise power supply design. With a simple pair of homemade probes, it’s easy to make the measurements using a compact VNA. Read on to find out how.

The voltage regulator module (VRM) contributes system level noise in several ways. Power integrity (PI) engineers tend to focus on transient voltage noise related to high-speed dynamic current. Many PI simulators ignore the VRM noise and use an ideal resistor and inductor model to represent the VRM. This overly simplistic approach misses many potential system level issues.

My friend Steve Sandler pointed out a major hurdle we face in power distribution design: power engineers (who design power converters) and power integrity engineers (who design system bypassing-decoupling networks) use different vocabulary, techniques, and requirements. To understand a little better how we got here, I want to start with a prediction I heard sometime in the early 90s at one of the conference keynote speeches: “In 10 to 20 years, computers will look like hairy steamy golf balls.” 

Obtaining accurate measurement data requires either accurate knowledge and accounting for the probe and fixture influence OR calibration methodology to remove these effects prior to measurement.

A TDR (time domain reflectometer) is an instrument that probably has the fastest rise time of any instrument in your lab, but how accurate is it? Eric tests accuracy using a DC Ohmmeter in this piece.

Dialog Semiconductor Plc, announced its latest configurable mixed-signal integrated circuit (CMIC) device with low dropout (LDO) regulator performance, the SLG51000. The SLG51000 features the highest power supply rejection ratio (PSRR) and lowest output voltage noise of any programmable multi-channel LDO on the market to power advanced camera and sensor systems.

This paper is a case study on causality problems in PDNs during power-aware SI simulations. It covers the causality of a PDN, and it reveals the impact on a design if a causality check is not done on the PDN for the package or board.

When you make a 2-port shunt through measurement using a commercial vector network analyzer the measurement includes an undesirable ground loop. Left uncorrected, the ground loop introduces significant errors. This paper shows how to solve this problem.

Get six experts in a room together and you are likely to hear seven different opinions. Not so at the Future of Power Integrity Panel Discussion at DesignCon 2019.  The consensus of this panel of experts is that the future of power integrity will include single processor chips drawing as much as 1000 A and more. Read on for the details of this discussion!

Switch-mode power supplies (SMPS) are commonly used DC-to-DC converters in many electronic components. By their nature, they can generate a lot of radiated emissions. Unless care is taken, it is difficult to separate what is the actual voltage on the power rail and what is an artifact due to the way we probe the circuit. The project outlined here shows how to avoid EMI pick-up and cable reflection noise.