Signal Integrity

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DDR5 Signal Integrity Fundamentals

The most notable difference between DDR5 and previous generations is the introduction of decision feedback equalization, a technique used in serial link systems to improve the integrity of received signals.  In the wake of the new technology, this short article outlines some of the fundamental signal integrity concepts in the context of DDR5.


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Nine Essential Principles of Signal Integrity

SIJ technical editor Eric Bogatin notes that there are some problems that occur over and over again across product families and applications. They have a handful of essential principles at their underlying root cause. In this blog, he explains that if we really understand these underlying principles, the root cause of the problems will be more apparent and their solutions closer to implement.


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How to Stop Your Differential Vias from Leaking

Can common via structures transfer any data rate or are they limited with a defined bandwidth? If so, what limits its bandwidth? And what can be done when the bandwidth of the signal is greater than the bandwidth of the G-S-S-G structure? This technical feature from Dror Haviv explains.


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Evaluating Oscillator Power Supply Noise Rejection: It’s the Total Jitter that Matters

Designers pushing the limits in their application can run into situations where the XO performance is inadequate for their next design due to the way it reacts to the noise and ripple in the power supply. To achieve optimal performance, they most likely will find they will need to do more than a simple datasheet evaluation to select their next XO. Read on for details on a PSNR test method to help select an optimal XO.


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