Understanding a few simple power integrity (PI) fundamentals can go a long way towards increasing design margins when delivering power to high-speed digital loads. In this piece, Heidi Barnes provides some fundamental lessons on impedance.
It takes only one rogue voltage wave to kill a PDN in high-speed digital designs. Flat impedance optimization before layout lowers the risk of rogue waves occurring in your design. Heidi Barnes explains how rogue waves occur and addresses how to get the best performance at the lowest cost.
Wondering about the practical uses of the proposed IEEE P370 standard? This paper shows some applications of the draft IEEE P370 standard in order to demonstrate its effectiveness for interconnect measurement.
The fixtures used to characterize interconnects in complex systems can have a significant effect on the measured data, read on to get the background and perspective on IEEE P370. Check out this Outstanding Paper Award Winner from EDI CON USA 2018.
Here's a proposed method that improves the accuracy of DDR4 statistical simulation by using the mask correction factor. It presents a validated correlation between measured and simulated data to show that this methodology can be effectively used for DDR4 design