Featured on Topic Pages

RSS

This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off.

In recent years, the IEEE Electrical Packaging Society technical committee for electrical design, modeling, and simulation recognized the need for open-source benchmarks for the simulation tool, verification, and test and measurement solution vendors. The intention is to overcome the obstacles that developers and users of such tools and instruments often encounter and create a growing library of benchmark cases for signal and power integrity challenges. As of October 2023, there are four published benchmark cases in the repository. This article describes a proposal for a fifth benchmark.

Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dk_z values instead of in-plane Dk_xy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. 

Semiconductor signal conditioning and signal recovery innovations have extended data rates by managing allowable signal-to-noise ratio (SNR) at progressively higher Nyquist frequencies. We have experienced how each successive signaling technology increases the electro-mechanical design resolution needed to address the channel physics while respecting the SNR of the chips. These movements throughout the years have provided a baseline of traditional design goals that lead us to better understand today’s 224 Gbps-PAM4 physical layer requirements.

In just two generations, six different technological revolutions have transformed our economy, our careers, and our quality of life, for better or for worse. Eric Bogatin reflects upon industry progress and explores the potential impact of the latest development in technological innovation, generative AI.

In this article, Bert Simonovich explores how to avoid “garbage in, garbage out” with field solvers by building an understanding of the nuances of PCB fabrication processes, the interpretation manufacturers’ data sheets, and the tool’s user interface.

In part three of the Ultra-Fine Line Design Guide series, previously introduced methodology is used to explore the design space for a differential pair when the return plane is far enough away that coupling to it is negligible. Read on. 

This article presents case studies where troubleshooting tools such as RF current probes and resistive probes proved effective in troubleshooting low-frequency conducted emissions. Read on.