Stories tagged with this taxonomy will display at the top of topic landing pages https://www.signalintegrityjournal.com/rss en-us http://www.signalintegrityjournal.com/articles/4288 Thu, 18 Jun 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4288-pam2-vs-pam4-signaling-simply-explained 4288 PAM2 vs. PAM4.png http://www.signalintegrityjournal.com/articles/4287 Wed, 17 Jun 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4287-when-frequency-shapes-time-how-s-parameter-properties-shape-simulated-tdr-behavior 4287 When Frequency Shapes Time.png http://www.signalintegrityjournal.com/articles/4286 Sun, 17 May 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4286-evolution-of-the-pdn-design-process-explaining-the-second-paradigm-shift 4286 Evolution of the PDN.png http://www.signalintegrityjournal.com/articles/4277 Wed, 13 May 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4277-machine-learning-models-for-si-pi-analysis-with-meshed-planes Cadence.png http://www.signalintegrityjournal.com/articles/4284 Mon, 27 Apr 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4284-stop-breaking-the-loop-modern-closed-loop-stability-in-ads Stop Breaking the Loop: Modern Closed-Loop Stability in ADS http://www.signalintegrityjournal.com/articles/4274 Tue, 21 Apr 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4274-ai-assisted-hfss-modeling-for-100-ghz-high-speed-interconnect-design HYPERLABS http://www.signalintegrityjournal.com/articles/4275 Mon, 20 Apr 2026 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4275-why-power-architectures-constrain-new-space-ai-missions Vicor This article describes the use of Cadence’s Sigrity signal and power integrity solution ML optimization algorithm to quickly and efficiently converge on the best set of parameters in a set of IBIS-AMI models. The application of Sigrity was investigated for refining IBIS- AMI parameters to find the optimal set of values to maximize a specific metric. This article describes the use of Cadence’s Sigrity signal and power integrity solution ML optimization algorithm to quickly and efficiently converge on the best set of parameters in a set of IBIS-AMI models. The application of Sigrity was investigated for refining IBIS- AMI parameters to find the optimal set of values to maximize a specific metric.

]]> http://www.signalintegrityjournal.com/articles/4099 Wed, 18 Feb 2026 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/4099-optimization-of-ibis-ami-model-parameters-with-machine-learning-algorithms Cadence Cover 1025m28.png Among various forms of signal degradation, skew is a key contributor to timing errors in systems operating at multi-gigabit data rates. An increasingly important factor at high speeds is material-induced skew due to local differences in dielectric constant arising from the PCB’s woven glass fabric reinforcement. This article aims to unpack the root causes of material-induced skew, particularly focusing on the glass weave effect, and explores mitigation techniques ranging from laminate selection to signal routing strategies. Among various forms of signal degradation, skew is a key contributor to timing errors in systems operating at multi-gigabit data rates. An increasingly important factor at high speeds is material-induced skew due to local differences in dielectric constant arising from the PCB’s woven glass fabric reinforcement. This article aims to unpack the root causes of material-induced skew, particularly focusing on the glass weave effect, and explores mitigation techniques ranging from laminate selection to signal routing strategies.

]]> http://www.signalintegrityjournal.com/articles/4105 Sat, 17 Jan 2026 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/4105-material-induced-skew-in-high-speed-multilayer-pcbs-influences-and-mitigation-strategies Rogers Cover 1025m35.png lsimonovich@lamsimenterprises.com Bert Simonovich explains why material anisotropy is not solely responsible for contributing to Dkeff surrounding a via hole structure. The via barrel conductor roughness and resin content of the as-fabricated dielectric pressed thicknesses must be considered and adjusted before applying this heuristic method to calculate Dkxy. Bert Simonovich explains why material anisotropy is not solely responsible for contributing to Dkeff surrounding a via hole structure. The via barrel conductor roughness and resin content of the as-fabricated dielectric pressed thicknesses must be considered and adjusted before applying this heuristic method to calculate Dkxy.

]]> http://www.signalintegrityjournal.com/articles/4107 Sat, 10 Jan 2026 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/4107-the-imperfect-via-the-rough-truth-lurks-beneath-the-surface Bert Simonovich Cover 1025m29.png This article demonstrates accurate differential S-parameter measurements obtained from a single-ended 2-port VNA using ultra-broadband baluns and attenuators. This measurement system is a cost-effective alternative to purchasing a multi-port test set for a VNA. This article demonstrates accurate differential S-parameter measurements obtained from a single-ended 2-port VNA using ultra-broadband baluns and attenuators. This measurement system is a cost-effective alternative to purchasing a multi-port test set for a VNA. 

]]> http://www.signalintegrityjournal.com/articles/4102 Tue, 09 Dec 2025 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/4102-using-ultra-broadband-baluns-to-perform-differential-s-parameter-measurements-using-single-ended-2-port-vna Hyperlabs Cover 1025m34.png In this article, power rail voltage measurement uncertainty is examined using several different probe configurations to monitor VCore measurements on a Picotest S2000 load stepper board. The results reveal measurement variations up to 27 mV — a level of uncertainty that can completely mask the performance improvements engineers are seeking from advanced VRM technologies. Read on to learn how engineers can trust their measurements when the uncertainty exceeds the performance gains they are trying to validate. In this article, power rail voltage measurement uncertainty is examined using several different probe configurations to monitor VCore measurements on a Picotest S2000 load stepper board. The results reveal measurement variations up to 27 mV — a level of uncertainty that can completely mask the performance improvements engineers are seeking from advanced VRM technologies. Read on to learn how engineers can trust their measurements when the uncertainty exceeds the performance gains they are trying to validate.

]]> http://www.signalintegrityjournal.com/articles/4101 Wed, 19 Nov 2025 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/4101-seeing-through-the-noise-reliable-power-rail-measurements-in-high-current-ai-systems Brokaw Sandler Cover 1025m36.png As Ray Kurzweil’s predictions edge closer to reality, AI continues to transform engineering, education, and daily life. Follow along as Signal Integrity Journal Technical Editor Eric Bogatin examines the risks and rewards of technological evolution while reflecting on the role of humans in an AI-driven future. As Ray Kurzweil’s predictions edge closer to reality, AI continues to transform engineering, education, and daily life. Follow along as Signal Integrity Journal Technical Editor Eric Bogatin examines the risks and rewards of technological evolution while reflecting on the role of humans in an AI-driven future.

]]> http://www.signalintegrityjournal.com/blogs/4/post/4093 Sun, 02 Nov 2025 23:00:00 -0500 https://www.signalintegrityjournal.com/blogs/4-eric-bogatin-signal-integrity-journal-technical-editor/post/4093-the-impact-of-ai-at-the-singularity Bogatin Editor's Note Cover 1025m30.png This article introduces a hardware-centric definition of compute cluster bisection bandwidth as a performance metric for AI-scale 448 Gbps systems. Unlike traditional abstractions, this metric is grounded in physical interconnect layout and IO port availability, enabling system architects to evaluate bandwidth provisioning through real, bidirectional link paths. This article introduces a hardware-centric definition of compute cluster bisection bandwidth as a performance metric for AI-scale 448 Gbps systems. Unlike traditional abstractions, this metric is grounded in physical interconnect layout and IO port availability, enabling system architects to evaluate bandwidth provisioning through real, bidirectional link paths.

]]> http://www.signalintegrityjournal.com/articles/4084 Sun, 19 Oct 2025 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/4084-manypoint-networks-a-system-co-design-framework-for-448-gbps-ai-fabrics-and-beyond Samtec Cover 1025m27.png EM simulators that are optimized for PCB PDN simulations provide an increased level of automation to enable the basics of DC IR Drop, electrothermal, and AC impedance for early detection of design issues. In this article, Heidi Barnes, Steve Sandler, and Benjamin Dannan examine why the ability to optimize a PDN for ZTarget with PCB parasitics in the frequency domain and then export to an end-to-end PI Digital Twin simulation for validation in the time domain should be standard practice for the PI engineer. EM simulators that are optimized for PCB PDN simulations provide an increased level of automation to enable the basics of DC IR Drop, electrothermal, and AC impedance for early detection of design issues. In this article, Heidi Barnes, Steve Sandler, and Benjamin Dannan examine why the ability to optimize a PDN for Z_Target with PCB parasitics in the frequency domain and then export to an end-to-end PI Digital Twin simulation for validation in the time domain should be standard practice for the PI engineer.

]]> http://www.signalintegrityjournal.com/articles/3788 Sat, 22 Mar 2025 01:00:00 -0400 https://www.signalintegrityjournal.com/articles/3788-how-to-simulate-low-voltage-high-power-2000-amps-to-a-dynamic-digital-load Cover Feature 2025 Cover 12-19-25.png When designing circuit boards, a change made to one aspect of the design intended to resolve an issue can cause problems elsewhere. To reduce the problem of soldering on SMA connectors in an edge launch, a significant signal integrity problem has been introduced. This article explores best practices and provides insight into avoiding an inadvertent mistake. When designing circuit boards, a change made to one aspect of the design intended to resolve an issue can cause problems elsewhere. To reduce the problem of soldering on SMA connectors in an edge launch, a significant signal integrity problem has been introduced. This article explores best practices and provides insight into avoiding an inadvertent mistake.

]]> http://www.signalintegrityjournal.com/articles/3810 Sat, 15 Mar 2025 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/3810-a-subtle-problem-to-avoid-in-your-next-design A Subtle Problem to Avoid 1-2-25.png Intra-pair skew is a crucial metric when working with multiple lines. Its behavior, measurements, and interpretations are closely linked to other forms of signal degradation, making the definition of a single skew value a nuanced issue that requires careful consideration. In this article, Gustavo Blando and Prashant Pappu introduce three distinct methods for measuring skew, providing options for a wide variety of contexts and skew measurement goals. Intra-pair skew is a crucial metric when working with multiple lines. Its behavior, measurements, and interpretations are closely linked to other forms of signal degradation, making the definition of a single skew value a nuanced issue that requires careful consideration. In this article, Gustavo Blando and Prashant Pappu introduce three distinct methods for measuring skew, providing options for a wide variety of contexts and skew measurement goals.

]]> http://www.signalintegrityjournal.com/articles/3809 Sat, 15 Feb 2025 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/3809-analysis-of-skew Analysis of Skew 1-2-25.png In this article, Steve Sandler presents three viable solutions for measuring ultra-low impedance with a maximum of 10 ms, each of which can be performed using sophisticated and novel FFT based 3-port measurement. These methods involve applying digitally modulated patterns to create modulated load currents up to 1500 A and recording the resulting power rail voltage perturbations. In this article, Steve Sandler presents three viable solutions for measuring ultra-low impedance with a maximum of 10 ms, each of which can be performed using sophisticated and novel FFT based 3-port measurement. These methods involve applying digitally modulated patterns to create modulated load currents up to 1500 A and recording the resulting power rail voltage perturbations. 

]]> http://www.signalintegrityjournal.com/articles/3798 Thu, 06 Feb 2025 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/3798-ultrafast-impedance-measurement-of-active-ultra-high-current-pdns Ultrafast Impedance Measurement Cover 12-19-24.png The need for speed will be the driving force behind energy production and efforts to make increasingly efficient use of available energy. Eric Bogatin reflects upon the evolution of power resources from the Industrial Revolution to today’s generation of AI and network processors. The need for speed will be the driving force behind energy production and efforts to make increasingly efficient use of available energy. Eric Bogatin reflects upon the evolution of power resources from the Industrial Revolution to today’s generation of AI and network processors.

]]> http://www.signalintegrityjournal.com/blogs/4/post/3791 Sun, 12 Jan 2025 00:00:00 -0500 https://www.signalintegrityjournal.com/blogs/4-eric-bogatin-signal-integrity-journal-technical-editor/post/3791-the-need-for-speed-and-the-cost-in-power Editor's Note Cover 12-19-24.png This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off. This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off.

]]> http://www.signalintegrityjournal.com/articles/3445 Mon, 06 May 2024 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/3445-who-put-that-inductor-in-my-capacitor Who Put That Inductor in My Capacitor Cover 2024.jpg In recent years, the IEEE Electrical Packaging Society technical committee for electrical design, modeling, and simulation recognized the need for open-source benchmarks for the simulation tool, verification, and test and measurement solution vendors. The intention is to overcome the obstacles that developers and users of such tools and instruments often encounter and create a growing library of benchmark cases for signal and power integrity challenges. As of October 2023, there are four published benchmark cases in the repository. This article describes a proposal for a fifth benchmark. In recent years, the IEEE Electrical Packaging Society technical committee for electrical design, modeling, and simulation recognized the need for open-source benchmarks for the simulation tool, verification, and test and measurement solution vendors. The intention is to overcome the obstacles that developers and users of such tools and instruments often encounter and create a growing library of benchmark cases for signal and power integrity challenges. As of October 2023, there are four published benchmark cases in the repository. This article describes a proposal for a fifth benchmark.

]]> http://www.signalintegrityjournal.com/articles/3430 Wed, 03 Apr 2024 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/3430-introducing-an-upcoming-ieee-packaging-benchmark Introducing an Upcoming IEEE Packaging Benchmark Cover.png lsimonovich@lamsimenterprises.com Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dkz values instead of in-plane Dkxy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dk_z values instead of in-plane Dk_xy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. 

]]> http://www.signalintegrityjournal.com/articles/3422 Wed, 20 Mar 2024 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/3422-pcb-laminate-anisotropy-the-impact-on-advanced-via-modeling PCB Laminate Anisotropy The Impact on Advanced Via Modeling 1-25-24.png In this article, a machine learning approach based on Bayesian Optimization is proposed that creates an optimized bit pattern to maximize the ISI, resulting in faster convergence of eye diagram analysis. Numerical results demonstrate up to 14x speedup and more accurate results compared to the conventional eye diagram analysis. In this article, a machine learning approach based on Bayesian Optimization is proposed that creates an optimized bit pattern to maximize the ISI, resulting in faster convergence of eye diagram analysis. Numerical results demonstrate up to 14x speedup and more accurate results compared to the conventional eye diagram analysis.

]]> http://www.signalintegrityjournal.com/articles/3447 Tue, 06 Feb 2024 23:00:00 -0500 https://www.signalintegrityjournal.com/articles/3447-worst-case-bit-pattern-generator-for-eye-diagram-analysis-of-non-lti-high-speed-channels Worst-Case Bit-Pattern Cover.jpg Semiconductor signal conditioning and signal recovery innovations have extended data rates by managing allowable signal-to-noise ratio (SNR) at progressively higher Nyquist frequencies. We have experienced how each successive signaling technology increases the electro-mechanical design resolution needed to address the channel physics while respecting the SNR of the chips. These movements throughout the years have provided a baseline of traditional design goals that lead us to better understand today’s 224 Gbps-PAM4 physical layer requirements. Semiconductor signal conditioning and signal recovery innovations have extended data rates by managing allowable signal-to-noise ratio (SNR) at progressively higher Nyquist frequencies. We have experienced how each successive signaling technology increases the electro-mechanical design resolution needed to address the channel physics while respecting the SNR of the chips. These movements throughout the years have provided a baseline of traditional design goals that lead us to better understand today’s 224 Gbps-PAM4 physical layer requirements.

]]> http://www.signalintegrityjournal.com/articles/3391 Sat, 27 Jan 2024 00:00:24 -0500 https://www.signalintegrityjournal.com/articles/3391-the-road-from-1-gbps-nrz-to-224-gbps-pam4 The Road from 1 Gbps-NRZ to 224 Gbps-PAM4.png In just two generations, six different technological revolutions have transformed our economy, our careers, and our quality of life, for better or for worse. Eric Bogatin reflects upon industry progress and explores the potential impact of the latest development in technological innovation, generative AI. In just two generations, six different technological revolutions have transformed our economy, our careers, and our quality of life, for better or for worse. Eric Bogatin reflects upon industry progress and explores the potential impact of the latest development in technological innovation, generative AI.

]]> http://www.signalintegrityjournal.com/blogs/4/post/3387 Sat, 13 Jan 2024 00:00:00 -0500 https://www.signalintegrityjournal.com/blogs/4-eric-bogatin-signal-integrity-journal-technical-editor/post/3387-generative-ai-is-in-your-future Editor's Note 1-17-24.png lsimonovich@lamsimenterprises.com In this article, Bert Simonovich explores how to avoid “garbage in, garbage out” with field solvers by building an understanding of the nuances of PCB fabrication processes, the interpretation manufacturers’ data sheets, and the tool’s user interface. In this article, Bert Simonovich explores how to avoid “garbage in, garbage out” with field solvers by building an understanding of the nuances of PCB fabrication processes, the interpretation manufacturers’ data sheets, and the tool’s user interface.

]]> http://www.signalintegrityjournal.com/articles/2995 Thu, 16 Mar 2023 00:00:00 -0400 https://www.signalintegrityjournal.com/articles/2995-avoiding-gigo-with-field-solvers Avoiding GIGO 3-14-23.jpg Chaithra.Suresh@colorado.edu In part three of the Ultra-Fine Line Design Guide series, previously introduced methodology is used to explore the design space for a differential pair when the return plane is far enough away that coupling to it is negligible. Read on. In part three of the Ultra-Fine Line Design Guide series, previously introduced methodology is used to explore the design space for a differential pair when the return plane is far enough away that coupling to it is negligible. Read on. 

]]> http://www.signalintegrityjournal.com/articles/2859 Thu, 09 Feb 2023 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/2859-ultra-fine-line-differential-pair-design-with-no-return-plane SIJ_Article2991_feb23.jpg min.zhang@mach1design.co.uk This article presents case studies where troubleshooting tools such as RF current probes and resistive probes proved effective in troubleshooting low-frequency conducted emissions. Read on. This article presents case studies where troubleshooting tools such as RF current probes and resistive probes proved effective in troubleshooting low-frequency conducted emissions. Read on. 

]]> http://www.signalintegrityjournal.com/articles/2965 Wed, 01 Feb 2023 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/2965-troubleshooting-low-frequency-common-mode-emissions unnamed.jpg http://www.signalintegrityjournal.com/articles/2986 Sun, 01 Jan 2023 00:00:50 -0500 https://www.signalintegrityjournal.com/articles/2986-rogers-corporation-exhibiting-at-designcon-2023 Industry News Thumb http://www.signalintegrityjournal.com/articles/2989 Sun, 01 Jan 2023 00:00:00 -0500 https://www.signalintegrityjournal.com/articles/2989-anritsu-to-showcase-test-leadership-for-high-speed-communications-verification-at-designcon-2023 Industry News Thumb