Articles by Yuriy Shlepnev

How to Make Predictable PCB Interconnects Thumb

Lessons learned: How to Make Predictable PCB Interconnects for Data Rates of 50 Gbps and Beyond

Design of PCB interconnects for data channels running at bitrate 50 Gbps and beyond is a very challenging problem that requires analyses and measurements over extremely broad frequency bandwidth from DC to 50 GHz and above. This paper shares our experience in building a practical methodology to make predictable 50 Gbps interconnects models.

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Conductor Loss

How Interconnects Work: Modeling Conductor Loss and Dispersion

Models of transmission lines and transitions accurate over 5-6 frequency decades are required to simulate interconnects for serial data channels operating at 10-100 Gbps. Extremely broadband modeling of conductor properties for such high-speed channels is a challenging task. This paper explains physics of the conductor-related signal distortion effects in PCB and packaging interconnects. After reading this paper, you should be able to setup simple experiments in your EDA tool to figure out the limitations and will be sufficiently qualified to ask your EDA tool vendor questions about the accuracy of the conductor modeling effects.

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