Industry News

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Power Integrity Correlation of Ultra-Low-Impedance Via-Field Measurements

Ultra-low-impedance power distribution network (PDN) structures are difficult to correlate because the impedance of the device under test (DUT) can be comparable to artifacts introduced by probe coupling, probe landing, reference-plane placement, and electromagnetic solver configuration settings. This article shows some possible full-wave 3D simulation workflows for the IEEE TC-EDMS Benchmark Problem V, a four-via test case on 1 mm pitch in which the vias are shorted together on the L2 plane.  


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PCIe 7.0 at 128 GT/s: PAM4 Validation in Real CEM Channels

PCI Express® is accelerating to meet AI and hyperscale infrastructure demand. PCIe 7.0 reached Base Specification release in June 2025, defining performance at the ASIC pins, and the Peripheral Component Interconnect Special Interest Group (PCI-SIG) Board also announced direction pushing PCIe to 256 GT/s, signaling an accelerated roadmap beyond PCIe 7.0 128 GT/s, and reinforcing a faster standards cadence than prior generations.


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Mitigation of Ionizing Radiation Degradation in Linear Regulators Using eGaN HEMTs

Traditional space LDOs rely on silicon MOSFETs that suffer from radiation degradation. To solve this, Tony Marini from EPC Space highlights a revolutionary alternative using enhancement-mode Gallium Nitride (eGaN) HEMTs. Their unique material physics inherently resists Total Ionizing Dose (TID) effects without performance loss, ensuring exceptional parameter stability in harsh orbital environments.


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