Signal Integrity

JSL_EDI CON

EDI CON USA Comes to California!

Two full days of technical programming, the EDI CON University, panels, exhibition, networking and show floor presentations covering RF, microwave, signal integrity, power integrity and EMC/EMI await this year’s attendees in sunny Santa Clara, California.
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Silicon Labs 56G/112G SerDes Clocking

Silicon Labs Introduces Industry’s Broadest Portfolio for 56G/112G SerDes Clocking

Silicon Labs has expanded its timing portfolio to meet the high-performance clocking requirements of 56G PAM4 SerDes and emerging 112G serial applications. With this portfolio expansion, Silicon Labs offers a comprehensive selection of clock generators, jitter attenuating clocks, voltage-controlled crystal oscillators (VCXOs) and XOs for 100/200/400/600G designs that satisfy sub-100 fs reference clock jitter requirements with margin.


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Rohde_RTP olis

New High-performance Oscilloscope From Rohde & Schwarz

Innovative Signal Integrity, Measurement Speed and Range of Functions

Rohde & Schwarz introduced the new high-performance R&S RTP oscilloscope. During the development of the new oscilloscope family, the focus was on measurement accuracy, speed, a wide range of functions and future-proof technology.


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Keysight_Ixia

Ixia to Demonstrate the Industry’s Highest Density and Space Saving 400GE Test Solution at Interop Tokyo

AresONE-400G Named Best in Show Finalist at Interop Tokyo

Keysight Technologies, Inc. today announced that the company will demonstrate AresONE-400G at Interop Toyko (booth 4Y16) to be held June 13-15 at Makuhari Messe in Chiba, Japan. AresONE-400G is the first high-density 8-port 400 gigbit Ethernet (GE) test system in a 2 rack-unit (RU) fixed chassis based on 56Gb/s electrical interface with PAM-4 encoded signaling.


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