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VNAs make measurements in the frequency domain and can be used to supplant the information that native time domain instruments, like fast oscilloscopes, Signal Quality Analyzers (BERTs) and Time Domain Reflectometers/Transmission instruments (TDR/TDT’s) already provide.

This paper assesses how modern tools can be used to address poweraware SI challenges associated with I/O modeling, interconnect modeling, simulation, and analysis.  

This technical paper provides correlation studies between measured data and multiple field solver technologies, providing multiple references to different types of analyses that include AC frequency domain comparisons for both power integrity and signal integrity. It includes time domain characterization of the results using TDR and noise measurements for both packages and printed circuit boards. 

One of the most critical design parameters for PCB manufacturers and designers is the impedance of PCB routing. Failure to meet certain impedance design parameters can make the product on the printed circuit board not meet design specifications. This application note will introduce the capabilities for SIwave to automatically, and quickly, scan the entire PCB or package layout and determine the anticipated impedance using the design stackup to define the dielectric materials and layer thickness.

In today’s ever-changing PCB requirements arena, DC drop caused by IR losses are becoming a bigger concern for design engineers. Along with the IC currents demands increasing the currents carried on the PCB are rising as the voltages, and voltage margins, decrease. As the currents increase so do the heating effects of IR drop and their consequences to the PCB design. SIwave introduces a new solver type for design engineers to investigate preliminary thermal performance on designs.

Crosstalk, or coupling, in high speed printed circuit board and packages represent one of main signal integrity design challenges. The cost of failure is very high and requires careful design strategies. This application note will introduce the capabilities for SIwave to automatically, and quickly, scan the entire PCB or package layout and report Near and Far End crosstalk coefficients.

In order to accurately compute the response from high speed packages and printed circuit boards, it is essential that they are modeled comprehensively in simulation tools. This application note will introduce the capabilities for SIwave to model conformal solder mask layers in the stackup.