Articles Tagged with ''PDN''

Understanding a few simple power integrity (PI) fundamentals can go a long way towards increasing design margins when delivering power to high-speed digital loads. In this piece, Heidi Barnes provides some fundamental lessons on impedance.

I often get questions from my fellow design engineers from around the world asking why we should or should not use S parameters or Z parameters for power distribution network (PDN) designs or validation.  The truth is, we should be familiar with both, because depending on our design and validation tools, one or the other may be better suited for the task. Read on to find out why.

Measuring low impedance components with a 2-port vector network analyzer (VNA) is an essential technique that typically requires a VNA that costs more than $20,000. In this article, see how the authors measured an MLCC using $500 and an open-source simulation tool.

Sometimes, when SI and PI worlds collide, we get the best of both worlds. By borrowing a simple impedance measuring technique from the PI world, we have another tool at our disposal to measure true characteristic impedance from a uniformly designed transmission line in the SI world, read on to learn more.

It takes only one rogue voltage wave to kill a PDN in high-speed digital designs. Flat impedance optimization before layout lowers the risk of rogue waves occurring in your design. Heidi Barnes explains how rogue waves occur and addresses how to get the best performance at the lowest cost.

Low-speed printed circuit board (PCB) designs now have to deal with high-speed switching problems. This article examines the ground bounce generated from an LCD assembly while evaluating the impact of the ground bounce on the system level EMI. Three solution strategies to mitigate the ground bounce are analyzed, the pros and cons of each strategy are provided along with the test results.

Poor control loop stability results in degraded power supply rejection ratio, transient response, output noise, and, for mixed signal circuits, degraded jitter. Datasheet application examples and reference designs do not often include stability information, and measurements often conclude the stability is poor.

Measuring small resistance values is not trivial, but since 1861, when Lord Kelvin invented the Kelvin bridge,¹ we at least have a solution for measuring very low DC resistances: the four-wire Kelvin connection (see Figure 1). We measure the resistance by sending a known current through the resistor and measure the voltage drop using separate wires.

We searched for a superior cable for PDN measurements, then decided to create our own. Here’s the story.

This paper is a case study on causality problems in PDNs during power-aware SI simulations. It covers the causality of a PDN, and it reveals the impact on a design if a causality check is not done on the PDN for the package or board.