Items Tagged with 'PCB'


Who Put That Inductor in My Capacitor Cover 2024.jpg

Who Put That Inductor in My Capacitor?

This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off.

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PCB Laminate Anisotropy: The Impact on Advanced Via Modeling

Since woven glass PCB substrates are anisotropic, EDA design and modeling software hoping to advance AI and ML algorithms should have provisions to model anisotropic material, especially via transitions. In this article, Bert Simonovich discusses the importance of having an awareness of the test method used by CCL suppliers for accurate modeling and simulation. Simonovich covers how the use of out-of-plane Dkz values instead of in-plane Dkxy values for via modeling can cause misleading simulation results, which may result in reduced margins and potential compliance test failures when the design is built and tested. 

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Glass Transition Temperature and its Effects on Printed Circuit Board Reliability 3-5-24.jpg

Glass Transition Temperature and its Effects on Printed Circuit Board Reliability

The expansion of the resin systems in laminates has been a source of reliability problems as the electronics industry has placed ever higher demands on those used in printed circuit boards. Suppliers of these resin systems have improved their resin systems to eliminate or minimize failures from expansion as the systems using the PCBs have been made more complex and subjected to ever harsher environments. Currently, the only technologies that still suffer failures from resin expansion with temperature are triple-high stacked blind vias, which Lee Ritchey explores in this article.

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The Road from 1 Gbps-NRZ to 224 Gbps-PAM4

Semiconductor signal conditioning and signal recovery innovations have extended data rates by managing allowable signal-to-noise ratio (SNR) at progressively higher Nyquist frequencies. We have experienced how each successive signaling technology increases the electro-mechanical design resolution needed to address the channel physics while respecting the SNR of the chips. These movements throughout the years have provided a baseline of traditional design goals that lead us to better understand today’s 224 Gbps-PAM4 physical layer requirements.

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Look Before You Leap Cover.jpg

Look Before You Leap

In this installation of Engineering Nightmares, Robert Haller explores a keystone rule to keep in mind when troubleshooting signal integrity problems. Learn why signal integrity engineers should never perform a measurement or simulation without first anticipating what they expect to see.

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