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July 25, 2017
5 Leading EDA Tools for EMC/EMI Design Challenges This article reviews the capabilities, new functions and application examples of 5 leading software tools for EMC/EMI design challenges including Altair/FEKO, ANSYS, CST, Keysight and NI/AWR.
Practical DDR Testing: Compliance, Validation and Debug This article will examine what DDR interface testing is all about, concentrating primarily on the physical layer and solutions to common problems.
IDT's Flexible Timing Solution Provides Valuable Design Margin for Multi-Lane Interfaces IDT announced a highly-programmable clock generator and jitter attenuator IC featuring less than 200 fs of phase noise, providing valuable system design margin for 10 Gbps interfaces in wireline and wireless communication networks.
High Speed Digital Symposium 
Dr. Eric Bogatin, Editor of Signal Integrity Journal and Dean of the Teledyne LeCroy Signal Integrity Academy, will chair the symposium. This special event is sponsored by Signal Integrity Journal and requires a conference pass. View Full Program and Register
Visit our archived webinars page for educational resources on various design and measurement subjects and view at your convenience. |
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