EDI CON Conversations Offer New Insights

By Eric Bogatin

The third Electronic Design Innovation Conference (EDICON), was held Oct 17-18, 2018 in Santa Clara. The attendees were treated to two days of technical talks, tutorials and tradeshow with the overlapping topics of RF, SI, PI and EMI. This is a unique combination, allowing cross fertilization between these otherwise separate fields—here’s Eric’s review of some talks he saw and exhibitors he visited.

Rohde & Schwarz and Spirent announce collaboration for TC8 Automotive Ethernet Testing

Rohde & Schwarz and Spirent announced a new partnership to provide a fully integrated test solution, offering full coverage of both the physical and protocol layers for automotive Ethernet TC8 ECU test specifications. Learn more.

Passive Plus, Inc. Product Spotlight: EIA Capacitors

Passive Plus, Inc. offers a Low ESR/ESL EIA capacitor series. These multi-layer capacitors have been developed for High-Q and Microwave applications, where the need for Low Noise, High Self-Resonance, and High Working Voltage are required. They exhibit ultra-stable performance over temperature and are fully RoHS compliant.

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Safe Debugging of Embedded Power Supplies

By Rohde & Schwarz

Embedded power supplies combine traditional power supply components with multiple sensors, processing and control logic as well as digital communications interfaces. Test equipment for debugging requires isolated input channels for measurements of hazardous voltages. Download the app note to read more.

Bet Your Life

Ransom Stephens describes himself as physicist, author and technologist. Add life coach to that list, which he aptly played delivering one of the two keynotes at the Electronic Design Innovation Conference (EDI CON) last week in Santa Clara. Titled “Innovation, Incorporation, and Integrity,” Stephens riffed on why we work and not losing sight of our values and calling.

Upcoming Webinars

Keysight Webcast, A Practical Guide to Signal Integrity: Basic Analyses and Concepts

This webinar will analyze a typical high-speed channel with several different approaches: mixed-mode S-parameters, eye diagram metrics, time domain reflectometry (TDR) and single pulse response. For an engineer new to designing serial links such as PCI Express, it is essential to recognize that the signal can contain spectral content to tens of gigahertz. Learn more and register.

Analysis and Verification of DDR3/DDR4 Interfaces

DDR3/4 DRAM Memory is one of the last remaining parallel interfaces in current industry standards. It is expected to stay parallel (as the "dinosaur" of interface definitions) for the next generation of memory. Design and especially verification and debugging of the interface is a difficult task due to several specialties of DDR signaling, which will be covered in this webinar.

PAM4 Jitter, Noise, and BER Analysis

In this seminar techniques for analyzing the performance of PAM4 transmitters and receivers will be discussed. After a brief review of the PAM4 scheme, we dive into jitter and noise analysis of three eye diagram PAM4 signals including the key transmitter diagnostic and compliance tests. We then turn to receiver tolerance testing for both diagnostics including techniques for generating stressed PAM4 signals and measuring both the symbol and bit error ratios.

Visit our archived webinars page for educational resources on various design and measurement subjects and view at your convenience.
Browse webinars here.