Gustavo Blando

Gustavo Blando is a Senior Principal Engineer and leading Principal SI/PI Architect at Samtec Inc. In addition to his leadership roles, he's charged with the development of new SI/PI methodologies, high speed characterization, tools and modeling in general. Gustavo has twenty plus years of experience in Signal Integrity and high-speed circuits.


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Those Pesky Half-Wave Resonances

“Over the years I’ve come to realize that, particularly in signal integrity, half-wave resonances are often the cause of ugly S-parameters. You can argue that any type of resonance would cause problems, and you would be right. However, half-wave resonances are easily formed in topologies.” This article summarizes observations from Gustavo Blando on the formation and mitigation of half-wave resonances, and includes an in-depth study on the topic in PDF format from the author.

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Current Distribution, Resistance, and Inductance in Power Connectors

Engineers who design and model power distribution networks require accurate component level models from high frequency down to DC.  Accurate modelling of power connectors can guarantee best power transfer and minimize power-induced noise.  In this paper, which won a DesignCon 2020 Best Paper Award, the authors analyze the frequency-dependent resistance and inductance of various power connectors as well as pin patterns.

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DC blocking caps

DC Blocking Capacitor Location, who cares?

It's a fact, the older I get, the dumber I become. I came to that realization while thinking about this eternal question engineers have about placement of high speed DC blocking caps in serial link channels. A few years ago I would have been able to recite the pros and cons without hesitation, but now, after playing manager for a few years, before I answer I have to pause and think about it. Fortunately the answer comes back quickly and I can still sleep at night. I find this topic interesting for a few reasons; one, it's a very practical issue found in almost every high speed design, and second, and perhaps more importantly, it's one of those topics were intuition might lead you the wrong way.

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Figure 7

Sources and Compensation of Skew in Single-Ended and Differential Interconnects

VNA measurements showed that the board-to-board skew distribution of realistic board topologies/routes can be broad, and the peak measured skew was quite significant. Post processing of TDR data suggested that long routes parallel to the board edge may be particularly susceptible to skew variation due to the glass weave.
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S-parameter Renormalization, The Art of Cheating

As you know, "us", Signal and Power Integrity Engineers, are full of tricks, rules of thumb, and shortcuts. These tricks mostly help us understand something, save analysis time and, why not, make us look smarter than we really are!! In that vein, seldom have I encountered a quick and dirty trick as useful and underestimated as S-parameter renormalization.

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