Engineers who design and model power distribution networks require accurate component level models from high frequency down to DC.  Accurate modelling of power connectors can guarantee best power transfer and minimize power-induced noise.  In this paper, which won a DesignCon 2020 Best Paper Award, we analyzed the frequency-dependent resistance and inductance of various power connectors as well as pin patterns.  (Below is a summary of the work; Download the entire paper here.)

With the availability of detailed DC solvers using fine mesh, the DC and low-frequency current distribution in power structures has previously been analyzed PCBs that contain layer transitions with a multitude of vias. It was shown that for the same number of connecting vias, the current per via strongly depends on the via pattern.

When power connectors are used between two PCBs, the connector pins in an array work similarly to vias in a via array. This suggests that the total current per pin and the current distribution inside each pin can be a function of the geometry in the connecting boards. As a result, the actual performance of the power connector can't be fully analyzed without knowing the surrounding printed circuit board geometry selected by the user.

The results of our study have two significant outcomes to the designer utilizing a power connector. 1) A layout that optimizes current distribution across connector pins and thus improves power delivery. 2) An accurate representation of frequency dependent resistance and inductance in the relevant spectrum can be used to strategically optimize primarily the signal-to-power pin isolation to reduce noise coupling between signal pins and pins used to carry power and the potential coupling of noise between different power pins.

The simulation results start by analyzing an isolated power pin and pin pair case. The analysis follows with a power connector placed in between two PCBs. The PCB layout is selected to match an existing power connector design, so simulation to measurement correlation can be performed.

The results from the study answer the following questions: How does material and power pin geometry impact frequency dependent resistance and inductance? How do material properties change current distributions in complex geometries and layered metals? How does the layout of the PCB that is attached to the connector impact the current distribution, resistance, and inductance inside the power pins and on the PCB planes? What general connector pin geometries and pin assignments are better for printed circuit board layouts?

In addition, we explore the use of open pin-field connectors to supply power. A board designer often needs to allocate signal pins to carry current. How will the placement of power pins affect neighboring signal pins? What is the impact of connector location and pin assignment on power-to-signal crosstalk? We explore the spatial aspect of a power distribution system with connectors and its impact to signal integrity.

We look at three different connector families: a blade type connector, primarily designed to carry high currents instead of high-speed signals, a pin-array type connector that can be configured to carry high-speed signals or medium power-rail currents, and a mixed type connector, which has an open pin field array and power blades in the same shroud.

Simulation model

For high-speed connectors, full-wave models are typically provided as S parameters in Touchstone format. These models, however, often start at 10MHz and may not even have a DC data point. By doing so we potentially lose the frequency dependent variation that happens due to the early development of skin effect at lower frequencies.

To cover the important frequency range necessary for power applications, we start our data sets at 1kHz or lower and obtain a DC point separately. At low frequencies the resistance and inductance of the series path is dominant, and we can largely ignore the capacitance and conductance of the parallel path.  We start by establishing the baseline of our simulation data by analyzing a coaxial cable with its resistance and inductance.  The analytical values for resistance and inductance are compared with the simulated model. 

Subsequently, we analyze the impact of the layered metal for the impact of resistance and inductance.  Interconnect material is seldom pure copper for various reasons. For both cable wires and connector pins, the core tends to be steel alloy, brass or phosphor bronze. These materials are used to provide mechanical strength, flexibility, but are much poorer electrical conductors. At high frequencies this is compensated by plating with a thin layer of better conductor: copper or gold. Gold plating requires an underlying Nickel boundary, which is also relatively poor conductor, and it is ferromagnetic. This will result in a stronger frequency dependent resistance and inductance. 

Open pin-field connector with mixed power, ground and signal

With the ever-increasing pin count for signals and the limited board space, high-speed designers sometimes choose an open pin-field connector for maximum flexibility for carrying both powers and signals. We explore the impact of running power through signal pins in an open pin-field connector and study the crosstalk induced in its neighboring signal. Furthermore, we analyze whether the board has any impact on the power induced crosstalk.

We explore four different pin assignments in an open pin-field connector for powers and signals.  The power induced crosstalk for each pin assignment is analyzed.  Moreover, detailed analysis is performed to understand the cause of these crosstalk, and its impact from the board. 

Measurement and correlation

Connectors intended for high-speed applications are validated and characterized in custom evaluation boards. The connector pins and their immediate connections to the user geometry are designed for specific impedance, crosstalk and skew targets. This typically means impedance values close to 50 Ohms.

Insertion loss (IL) due to absorption losses is usually less important because the connectors tend to be physically and electrically short compared to the connecting traces or cables. The connector itself and the evaluation board as well are designed to minimize reflection losses, crosstalk and skew. This also means that the characterization and measurement of a high-speed connector is similar to how we measure high-speed traces and cables, which has well established instrumentation and connection solutions. The quality of the connector can be qualitatively judged from its impedance profile and scattering parameters.

Power connectors, on the other hand, are different. Though matched high-impedance power distribution networks have been proposed, those are not well suited for connectorized applications. Today the majority of the power connectors may be optimized for the best power transfer, which means the lowest possible impedance. Not only the connector pins or blades may have impedances very different from 50 Ohms, even more importantly, the user application geometry tends to have low impedances, sometimes milliohms.

Figure: Measurement setup for 100Hz – 1 MHz range.

For power applications the main parameter to optimize is resistance and inductance; the parallel-path elements of the transmission-line equivalent circuit, capacitance and parallel conductance usually can be neglected. As a result, traditional evaluation boards may not be the best options for power connectors (see Figure).  What measurement setup and equipment should be used to guarantee good measurement from high frequency down to DC?  Can simulation and measurement setup be different due to measurement limitation?  And do different pin configurations give different extracted resistance and inductance?  These are the topics discussed in detail.

Key takeaways

  • Simulation tools are capable of predicting low to high frequency resistance and inductance profiles.
  • Isolated connector measurements correlate well with simulation.
  • In measurements, two-port Shunt-through connection scheme is mandatory, whereas in simulations it is necessary only if there is large mode conversion.
  • Single-port simulations, on the other hand, were very sensitive to small changes in the port that had to be de-embedded.
  • Power induced crosstalk is both board and pinout dependent. 
  • Inter-leaved power/ground pin assignments are not optimal for signal to power crosstalk.
  • In this test board setup, power-ground-signal pinout gives the minimal induced crosstalk.
  • Crosstalk in the connector is accentuated by the board crosstalk.
  • Minimizing reflection discontinuities is essential for resonance-free crosstalk.

Download the full paper from DesignCon 2020 here.