Signal Integrity

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Stackup Beware: Case Study of the Effects on Transmission Line Losses Due to Mixed Reference Plane Roughness

Designing the right PCB stackup can make or break product performance. If the product has circuitry that is impedance and transmission loss sensitive, then paying attention to conductor surface roughness is paramount. Sometimes, however, the roughness of adjacent reference plane(s) is overlooked. If the adjacent high-speed signal layer uses smoother copper than one or both reference planes, a higher insertion loss than expected for that layer will occur and possibly cause a product to fail compliance. So, how is this determined before finalizing the stackup? Read on to find out.


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112 Gbps PAM4 Silicon and Connector Evaluation Platform

The continued progression to higher data rates puts increasing demands on the design of practical SerDes channels. At 112G-PAM4, the UI is only 17.86 ps, and signal transmission in the PCB must be highly optimized for loss, reflections, crosstalk, and power integrity. This article summarizes the key elements of a study that describes the signal-integrity and power-integrity design process and shows simulated SI and PI performance correlated to measured data as well as measured eye diagrams of a test board that uses a 112G-capable silicon and high-speed compression-mount cable connectors. 


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Multifunction instrument released by Liquid Instruments

Fans of a single, multifunction instrument that replaces a dozen benchtop instruments will be excited with the release from Liquid Instruments. Here’s a closer look at this multi-function instrument that combines the features of a bench top full of instruments, like a scope, a DMM, a function generator, a frequency response analyzer, a spectrum analyzer, and even an impedance analyzer, all into one USB controlled instrument. 


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