Extended Case Study
In the extended case study presented in this paper, I will use the as-fabricated cross-section measured parameters for Stub_1 to account for the discrepancy between the effective anisotropy and the heuristically derived anisotropy discussed in my DesignCon 2024 paper.1 Figure 15 is the negative image from the original x-section photo of Stub_1.6 The dielectric thickness measurements in yellow and summarized in the black box in the center of the via are from the original picture. After calibrating the microscope software to one of the original image dimensions, additional measurements for my case study were performed separately, with dimension lines shown in red.
Dkeff Due to Pressed Thickness
Table 1 summarizes as-designed stackup parameters shown in Figure 13 vs. the as-fabricated parameters and the effect on bulk Dk due to pressed thickness measured in Figure 15. To facilitate the comparison the individual core and prepreg thicknesses were combined or separated, as highlighted in yellow, to align with the equivalent x-section thickness measurements. In order to heuristically convert bulk Dkz to Dkxy single ply thickness is required and shown for completeness.
As we can see, the as-fabricated dielectric thickness is less than the as-designed thickness, resulting in an average bulk Dkz increase from 3.00 to 3.07, equivalent to 2.8%. Additionally, the average bulk Dkxy is 3.22, corresponding to an average anisotropy of 4.8%.
From the x-section measurements shown in Figure 15, Drillϕsmooth = 11.80 mils (299.7 µm); Drillϕrough = 12.66 mils (321.6 µm) and Antipadϕ = 40.04 mils (1.017 mm); and Dkeffsmooth = 3.22 from Table 1, using Equation 5 the effective Dkxy due to roughness (Dkeffxyrough) is calculated to be:
(9)
which increases Dkeffxy by 6.2%.Not counting for Dkeff correction due to inductance caused by roughness, the modeled anisotropy of the as-fabricated via Stub_1 is:
(10)
Taking the difference between Drillϕrough and Drillϕsmooth and dividing by 2, the surface roughness of the via barrel is approximately 0.43 mils (10.9 µm). Without modeling the actual via used in this case study, and assuming the contribution to Dkeff due to added inductance caused by roughness is roughly the same as the example in Figure 9, the polynomial fit equation from Figure 11 suggests that a 10.9 µm roughness adds another 1.36%. This brings the total effective anisotropy to:
(11)
resulting in a final Dkeff of:
(12)
Figure 16 is a comparison of simulated and measured insertion loss results, taken from the presentation.6 Using measured parameters for stub lengths and the Dk values from the as-designed stackup in the HFSS model the simulated quarter-wave resonant frequency is approximately 22.1GHz, while the measured frequency was approximately 20.9 GHz.
Using a stub length (StubLen) of 74.4 mils (1.89 mm) from x-section Figure 15 and applying Equation 13 and Equation 14 below, Dkeffmeas is 3.60 and Dkeffsim is 3.21 for an Λeff of 12.15%.
(13)
(14)
(15)
The comparison between the effective anisotropy calculated in Equation 11 (12.8%) and the effective anisotropy measured in Equation 15 (12.5%), along with the comparison of the final calculated Dkeff from Equation 12 (3.61) to the measured Dkeff from Equation 13 (3.60), demonstrates excellent correlation at 21 GHz, thereby validating my hypothesis.
Summary and Conclusions
This paper has explained why material anisotropy is not solely responsible for contributing to Dkeff surrounding a via hole structure. The via barrel conductor roughness and resin content of the as fabricated dielectric pressed thicknesses must be considered and adjusted before applying my heuristic method to calculate Dkxy. The extended case study6 revealed an effective anisotropy of 12.5% compared to bulk material anisotropy of 4.8% predicted by my heuristic method.1 Based on cross-section data from the extended case study, adjusting Dkeff for pressed thickness and via roughness adds an additional 8% to the effective anisotropy thereby validating my hypothesis.
Acknowledgements
I would like to thank Juliano Mologni from Ansys for his help with via simulations and Scott McMorrow from Samtec for providing additional as fabricated and simulation data from his DesignCon 2015 paper follow-up case study. I also like to thank Dr. Alexandre Gutterman for reviewing and providing feedback to improve clarity.
REFERENCES
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- IPC-600G, “Acceptability of Printed Boards”, July 2004.
- S. McMorrow et al, “Anisotropic Design Considerations for 28 Gbps Via to Stripline Transitions”, DesignCon 2015 proceedings, Santa Clara, CA.
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- A. Neves et al, “Free Signal Integrity? How Understanding Anisotropic Materials & Tolerances Could Increase Performance at 112/224Gbps & Beyond”, DesignCon 2025 proceedings, Santa Clara, CA.
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