July 17, 2018

Sponsored by: CST



Executive Q&A: David Kohlmeier, Mentor, A Siemens Business

By Janine Love

Recently, Signal Integrity Journal sat down with Dave Kohlmeier, the HyperLynx product line director of the Board System Division at Mentor, A Siemens Business, to talk about the latest engineering trends and challenges facing the industry. Learn more from the executive one-on-one.

Silicon Labs

Silicon Labs Introduces Industry’s Broadest Portfolio for 56G/112G SerDes Clocking

Silicon Labs has expanded its timing portfolio to meet the clocking requirements of 56G PAM4 SerDes and emerging 112G serial applications. With this portfolio expansion, Silicon Labs offers a comprehensive selection of clock generators, jitter attenuating clocks, voltage-controlled crystal oscillators (VCXOs) and XOs for 100/200/400/600G designs that satisfy sub-100 fs reference clock jitter requirements with margin.

TE Connectivity

TE Connectivity introduces Extra Large Array (XLA) Socket Technology for Next-Gen Data Centers

TE Connectivity introduced its new extra-large array (XLA) socket technology, which provides more reliable performance with 78 percent better warpage control than traditional molded socket technologies. The XLA socket technology allows TE to design enhanced sockets to support high data speeds in next-generation data centers.


SI/PI/EMI Consultants


SI/PI/EMI Consultants
Sometimes you need an assist with an SI, PI, or EMI issue. If you need help, check out this list of consultants working in signal integrity, power integrity, and EMC/EMI.

EDI CON University

EDI CON USA Introduces EDI CON University Sessions

This year, EDI CON USA will be holding its first EDI CON University sessions. These 2-hour sessions offer in-depth training in a particular topic, such as MIMO Test, Amplifier Design, and Measuring Impedance. All conference pass holders are eligible to attend, but pre-registration is required. Earn IEEE CEUs for EDI CON University 2018 Courses. Learn more and register today!

Upcoming Webinars

Passive Plus Inc. and Teledyne LeCroy  

Practical PCB Layout for SI/PI/EMC: What an EE Needs to Know to Survive PCB Manufacturing

If interconnects were transparent, this would be a very short webinar. But in all except the very simplest boards, the interconnects are not transparent. There are three general performance categories of boards based on the range of problems they will encounter. In the short time we will have, all we can do is introduce the best design practices to pay attention to in each of these three general classes of boards. We'll see how design decisions and board material decisions influence taming SI/PI and EMI problems.

Visit our archived webinars page for educational resources on various design and measurement subjects and view at your convenience.
Browse webinars here.

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