Bert Simonovich

Many claim that for stripline, it is ok to cross a split power plane, so long as the other adjacent reference plane is solid. Some others claim if there is an adjacent solid reference plane, less than 5mils away under the split, crosstalk will be mitigated. Read on to see an investigation into what really happens when stripline signals cross split power planes.

We care about maintaining the same differential impedance for the same reason we care about maintaining the same instantaneous impedance of a single-ended (SE) transmission line: to avoid reflections. SIJ’s EAB member Bert Simonovich explains the fundamentals and why it matters.

Bert Simonovich explains why you should take your shot at becoming an industry influencer, offering tips to get started and to keep moving.

Bert Simonovich reminisces about the problems and innovations that led to the invention of the point to multipoint non-contact interconnect bus.

Ask any engineer how to reduce the cross talk between two signal traces and the most common answer will be to add a guard trace. This should be the last resort, not the first choice. Guard traces can often introduce more problems than they solve.  Find out why in this article.

When starting a new project, board designers are often overwhelmed when trying to choose appropriate diff pair geometry, board material, and stackup to meet high-speed serial link loss budgets. Part of the printed circuit board (PCB) interconnect challenge is modeling transmission lines accurately. 

In the GB/s regime, accurate modeling of insertion loss and phase delay is a precursor to successful high-speed serial link designs. We propose a causal (physically meaningful) form of the Hammerstad and Cannonball-Huray metal roughness frequency dependent complex correction factor. Compared to the widely used, non-causal form, it considerably increases the inductive component of internal metal impedance. Transmission lines simulated with a causal version demonstrate increased phase delay and characteristic impedance. By obtaining the dielectric and roughness parameters solely from manufacturers' data sheets, we validate the model through a detailed case study to test its accuracy.

It’s what you don’t know you don’t know that can ruin your day. This paper notes in detailed examples that with today’s high-speed designs, we can no longer restrict our thinking in terms of signal integrity, power integrity or EMC alone. We must consider all three disciplines and become educated about each of them to achieve successful designs.

As Dave Dunham from Molex Corp. likes to say, "When designing high-speed serial links beyond 10 GB/s, everything matters." In order to ensure first time success at these speeds, accurate channel modeling is a prerequisite. This is especially true for long backplane channels.