SiSoft today announced new Signal Integrity, SerDes, and Mixed-Signal design solutions developed jointly with MathWorks which will be on display this week at DesignCon. SerDes architects using MATLAB and Simulink can accurately model analog imperfections and link their designs to SiSoft QCD/QSI using standard compliant IBIS-AMI models and perform channel analysis and visualization.  DesignCon is happening January 29–31, 2019 at the Santa Clara Convention Center.

At DesignCon 2019, SiSoft is showcasing the next generation of SerDes design and IBIS-AMI modelling solutions for high-speed applications including DDR5, PCIe4, and emerging standards using PAM4 modulation. The ongoing SiSoft-MathWorks partnership has yielded two new products - Mixed-Signal Blockset and SerDes Toolbox - that focus on top-down design of Analog Mixed-Signal components such as PLLs, ADCs, and SerDes systems and algorithms.

“The next generation of high-speed serial and parallel interconnects require sophisticated equalization algorithms and higher order modulation. Consequently, flexibility in system-level analysis and modeling is crucial for SerDes architects, signal integrity engineers, and IBIS-AMI modelers”, noted Barry Katz, SiSoft’s president and CTO. “That’s why we are particularly excited to work with MathWorks and integrate SiSoft’s QCD/QSI with MATLAB and Simulink for AMI model development. We have created a complete workflow where SerDes architects can innovate more rapidly and adjust their AMI models in real time to validate requirements.”

“Mixed-Signal Blockset extends the Simulink platform for top-down design and verification of analog and mixed signal components and systems”, noted Arun Mulpur, Communication Electronics Semiconductors industry manager at MathWorks. “Engineers can now quickly create detailed behavioral models and use them throughout the design process – from design exploration all the way to verification.”

As frequencies and data rates increase, impairments need to be anticipated and corrected. The new products jointly developed by SiSoft and MathWorks provide a methodology to capture analog and digital effects at the system-level. With proven models and algorithms, system designers can more rapidly explore innovative architectures, for example taking into account timing errors, loop dynamics, and phase noise. Using the same mixed-signal model, system designers can also test and prototype the implementation, and share it with customers and colleagues as executable specifications.