Items Tagged with 'Samtec'

Samtec, Inc. announced the release of the BE71A Bulls Eye^® Phase & Amplitude Stable Test Assembly. 

Samtec, Inc announced production quantity availability of single-ended and mixed single-ended / differential pair signaling options using AcceleRate^® Slim Cable Assemblies.

Samtec, Inc. will be demonstrating next-generation, high-performance optical and copper interconnect solutions in South Hall booth #1101 at the upcoming OFC exhibition

Samtec interconnects selected to improve signal integrity and reduce SWaP of evolving VITA standards requiring miniaturization and functionality advancements.

This article details the electromagnetic simulation of low frequencies in Ansys Electronics Desktop, focusing specifically on arbitrary length transmission lines and cables with uniform cross sections. It presents two-dimensional, quasi-static field and circuit solvers as an alternative simulation method, covering the simulation workflow while highlighting the differences and benefits of using this method as opposed to using predominant full-wave field solvers. 

Samtec announces that it will showcase high-performance interconnect solutions and enabling technologies that support data rates up to 448 Gbps and signals up to 130 GHz in booth #939 at DesignCon 2026.

Samtec, Inc. has implemented a variety of strategic options to help minimize tariff exposure while maintaining competitive pricing and the industry’s best lead times for its customers.

This article discusses electrical and thermal co-simulation of multi-pin interconnects. Using Ansys Q3D and Icepak (2025R1), it highlights key practices such as parametrization, matrix reduction, and mesh settings to ensure accurate and efficient results with complex geometries.

AcceleRate HD slim, high-density array connectors now available with 16 mm stack heights and up to 400 total positions.

This article introduces a hardware-centric definition of compute cluster bisection bandwidth as a performance metric for AI-scale 448 Gbps systems. Unlike traditional abstractions, this metric is grounded in physical interconnect layout and IO port availability, enabling system architects to evaluate bandwidth provisioning through real, bidirectional link paths.